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Handling of unused pins of FPGA on the Lightcrafter(DLPC300)

Shinichi Watanabe
Intellectual 460 points
Other Parts Discussed in Thread: TFP401A, DLPC300

A customer plans to design their hardware with DCPC300 based on
Lightcrafter. They need only stored pattern display.
So they would like to remove DVI Rx(TFP401A).

Their question is,
1.Is it possible to remove TFP401A?
2.Do they need to add pull-up resistor or pull-down resistor on the
video input pins, clock and sync pin input of the FPGA?

Thank you.
Regards,
S.Watanabe

  • 0
    TI__Intellectual 2305 points
    Watanabe-San,

    Yes, it is possible to remove the TFP401A.

    I'm still consulting experts to accurately answer your #2 question, hopefully in a couple of days.

    How many patterns, and what type of patterns does the customer need to display?

    Regards,
    A214529
  • 0 in reply to A214529
    Intellectual 460 points

    Dear Mr.A214529,  thank you for your quick reply.

    The customer is going to build PWB inspection machine with structured light method. 

    I do not have an information about their structured patterns.  But they are evaluationg DLPC300

    with Lightcrafter.  Please provide let us know when you get some information from FPGA expert.

    Thank you.

    Regards,

    S.Watanabe

  • 0 in reply to Shinichi Watanabe
    TI__Intellectual 2305 points
    Watanabe-San,

    Is the customer still using the DM365?

    The DM365 takes care of configuring the FPGA based on the commands received from the TCP over USB interface from the PC (See section 3.2 - Current Display Mode (register 0×01 0×01) of www.ti.com/.../dlpu007d.pdf

    Customer can use either way (pull-down to GND if they insist) provided the FPGA is configured NOT to process the signal from the DVI port. So customer should select "Internal Test Pattern (0x01) as the Current Display Mode.

    I'll add complete answer - when no device is connected - in the near future.

    Regards,
    A214529
  • 0 in reply to A214529
    Intellectual 460 points

    Mr.A214529, thank you for your response.

    The customer plans to use DM365 and FPGA.   They just remove DVI receiver(TFP401A) because

    they would like to us USB communications with host MCU and they would like to reduce any risk of

    design change on their first unit.   Please let us know when you get the information.

    Regards,

    S.Watanabe

  • 0 in reply to Shinichi Watanabe
    TI__Intellectual 2305 points

    Watanabe-San,

    The DM365 takes care of configuring the FPGA based on the commands received from the TCP over USB interface from the PC (See section 3.2 - Current Display Mode (register 0×01 0×01) of www.ti.com/.../dlpu007d.pdf

    When using the DM365, customer can use either way (pull-down all inputs to GND for instance) provided the FPGA is configured NOT to process the signal from the DVI port. So customer should select "Internal Test Pattern (0x01) as the Current Display Mode.

    When no device is connected (neither the DM365, nor the TFP410A), customer just need to ground PCLK, DATEN, VSYNC and HSYNC.  Customer can also ground the other video inputs too.

    Regards,
    A214529

  • 0 in reply to A214529
    Intellectual 460 points

    Mr.A214529,

    Thank you for providing an answer about FPGA input pins.

    I unserstand the situations.  I will make a contact with a customer.

    Thank you.

    Best regards,

    S.Watanabe