I'm programming the APPSFPGA to interface with an external A2D board with an operating supply between 2.7V - 5.5V. I'm interested to use the J6 GPIO connector for the interface with a power supply of 3.3V.
The reference manual (2510455) says that it is a 2.5V connector, which is indeed what I see on the example FPGA code supplied by TI. However, I was wondering if there is a reason why I should avoid reprogramming the corresponding virtex5 pins to 3.3V?
Are you spinning your own board or planning to use the D4100 as is? I ask because the I/O have to be defined in groups and reference voltages supplied. I believe the kit board is already set up with 2.5 V I/Os so that it may not be as simple as redefining just the GPIO i/o pins.
Thanks for the quick response.
I am using the D4100. You are right, i forgot about the reference voltage which is grouped with the virtex GPI/O and is 2.5V.
In that case I assume the best solution will be to use voltage regulators on the external board. Is there anything else I should be aware of?
Beyond the need for all I/O's in a Virtex I/O bank to be defined with and be provided with the same voltage I am not aware of any. I am not sure how you will isolate the reference voltage signal traces on the D4100 board.
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