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Hi friends,

I am using a C5515 device and a AIC3254 audio codec. I am trying to connect the codec to the DSP using I2S.

I want this configuration:

AIC as a master, DSP as a slave.

16bit words

48ksamples per second

write data to the codec and output it to the head phones.

The AIC is connected using I2S 1.

Below please find a sample from the code I am using.

I am having two problems:

1) The transmit interrupt is never received, so the code stops in the while((Xmit & I2S1_IR) == 0);

2) I hear a lot of noise, and not the sound that I send to the codec.

Any help please? I suspect I have some wrong PLL or clock settings, but am not sure. I have tried several types of settings, but after three days trying, I decided to see if I could get an opinion from you guys :)

Thanks a lot!

Simon

void main( void )
{
   aic3254_initialise();
  
   test();
}

Int16 aic3254_initialise( )
{
 SYS_EXBUSSEL &= ~0x7000;  
    SYS_EXBUSSEL |=  0x1000;         // Configure Parallel Port
 
    /* Configure Serial Port */
 SYS_EXBUSSEL &= ~0x0C00;   
 SYS_EXBUSSEL |=  0x0400;         // Serial Port mode 1 (I2S1 and GP[11:10])
 
 EVM5515_GPIO_init();
 EVM5515_GPIO_setDirection(GPIO10, GPIO_IN);
 EVM5515_GPIO_setDirection(GPIO11, GPIO_IN);
 EVM5515_GPIO_setDirection(GPIO4,  GPIO_OUT);
 EVM5515_GPIO_setOutput( GPIO4, 1 );    // Take AIC3254 out from reset
 EVM5515_wait( 100 );         // Wait
 EVM5515_I2C_init( );                      // Initialize I2C
 
 
 /* Configure AIC3204 */
    AIC3204_rset(  0, 0x00 );           // Select page 0
    AIC3204_rset(  1, 0x01 );           // Reset codec
    AIC3204_rset(  0, 0x01 );           // Point to page 1
    AIC3204_rset(  1, 0x80 );           // Disable crude AVDD generation from DVDD
    AIC3204_rset(  2, 0x00 );          // Enable Analog Blocks
 
    // PLL and Clocks config and Power Up 
    AIC3204_rset(  0, 0x00 );           // Select page 0
    AIC3204_rset( 27, 0x0D );           // BCLK and WCLK is set as i/p to AIC3204(Slave)
    AIC3204_rset(  4, 0x03 );           // BCLK and WCLK are outputs
    AIC3204_rset(  6, 0x08 );           // PLL setting: J
    AIC3204_rset(  7, 0x07 );             // PLL setting: HI_BYTE(D)
    AIC3204_rset(  8, 0x80 );             // PLL setting: LO_BYTE(D)
    AIC3204_rset( 30, 0x91 );
 
    // For 48 KHz sampling
    AIC3204_rset(  5, 0x92 );           // PLL setting: Power up PLL, P=1 and R=2
    AIC3204_rset( 13, 0x00 );           // Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling
    AIC3204_rset( 14, 0x80 );           // Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080
    AIC3204_rset( 20, 0x80 );           // AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6
    AIC3204_rset( 11, 0x88 );           // Power up NDAC and set NDAC value to 8
    AIC3204_rset( 12, 0x82 );           // Power up MDAC and set MDAC value to 2
    AIC3204_rset( 18, 0x88 );           // Power up NADC and set NADC value to 8
    AIC3204_rset( 19, 0x82 );           // Power up MADC and set MADC value to 2
 
    // DAC ROUTING and Power Up
    AIC3204_rset(  0, 0x01 );           // Select page 1
    AIC3204_rset( 12, 0x08 );           // LDAC AFIR routed to HPL
    AIC3204_rset( 13, 0x08 );           // RDAC AFIR routed to HPR
    AIC3204_rset(  0, 0x00 );           // Select page 0
    AIC3204_rset( 64, 0x02 );           // Left vol=right vol
    AIC3204_rset( 65, 0x00 );           // Left DAC gain to 0dB VOL; Right tracks Left
    AIC3204_rset( 63, 0xd4 );           // Power up left,right data paths and set channel
    AIC3204_rset(  0, 0x01 );           // Select page 1
    AIC3204_rset( 16, 0x06 );           // Unmute HPL , 6dB gain
    AIC3204_rset( 17, 0x06 );           // Unmute HPR , 6dB gain
    AIC3204_rset(  9, 0x30 );           // Power up HPL,HPR
    AIC3204_rset(  0, 0x00 );           // Select page 0
    EVM5515_wait( 500 );                // Wait
 
    // ADC ROUTING and Power Up
    AIC3204_rset(  0, 0x01 );           // Select page 1
    AIC3204_rset( 52, 0x0C );           // STEREO 1 Jack
             // IN2_L to LADC_P through 40 kohm
    AIC3204_rset( 55, 0x0C );           // IN2_R to RADC_P through 40 kohmm
    AIC3204_rset( 54, 0x03 );          // CM_1 (common mode) to LADC_M through 40 kohm
    AIC3204_rset( 57, 0xC0 );           // CM_1 (common mode) to RADC_M through 40 kohm
    AIC3204_rset( 59, 0x00 );           // MIC_PGA_L unmute
    AIC3204_rset( 60, 0x00 );           // MIC_PGA_R unmute
    AIC3204_rset(  0, 0x00 );           // Select page 0
    AIC3204_rset( 81, 0xc0 );           // Powerup Left and Right ADC
    AIC3204_rset( 82, 0x00 );           // Unmute Left and Right ADC
   
    AIC3204_rset( 0,  0x00 );   
    EVM5515_wait( 200 );  // Wait
   
 /* I2S settings */
    I2S1_SRGR = 0x0015;
    I2S1_ICMR = 0x003F;           // Enable interrupts
    I2S1_CR   = 0x8010;           // 16-bit word, Slave, enable I2C

}

Int16 test( )
{
 for ( i = 0 ; i < 5 ; i++ )
    {
        for ( j = 0 ; j < 1000 ; j++ )
        {
            for ( sample = 0 ; sample < 48 ; sample++ )
            {
             data3 = I2S1_W0_MSW_R;
               data1 = I2S1_W0_LSW_R;
               data4 = I2S1_W1_MSW_R;
               data2 = I2S1_W1_LSW_R;
              
             while((Rcv & I2S1_IR) == 0);  // Wait for interrupt
             
                I2S1_W0_MSW_W = (sinetable[sample]) ;
                I2S1_W0_LSW_W = 0;
                I2S1_W1_MSW_W = (sinetable[sample]) ;
                I2S1_W1_LSW_W = 0;
                while((Xmit & I2S1_IR) == 0);  // Wait for interrupt
               
            }
        }
    }
}