I’m currently stumped on how to run an fft ( N = 1024) using the C5535 ezDSP from Spectrum Digital. I’ve been trying to use the built in fft co-processor for this. The code was built from information found in the C5535 Technical Reference Manual (spruh87b) and in the TMS320C55x DSP Library Programmers Guide (spru422j).
The fft is being performed on some real world data declared as a Uint16 array in the code. The code then goes through the motions of setting everything up , then the fft is executed. After this the results are stored to the SD card using 2 functions found in the CSL examples (Init and mmcConfigFs).
Everything compiles and data is written to the SD card in a file called “data.txt”. Problem is that the data in the file consists of 1024 entries of the same constant value! (This constant value changes on each run of the program).
There is also a warning that appears on every compilation "creating output section "data_br_buf" a SECTIONS specification"
The lnkx.cmd file was modified to include the following, as per the Tech Ref Manual.
/* HWAFFT Routines ROM Addresses */
_hwafft_br = 0x00fefe9c;
_hwafft_8pts = 0x00fefeb0;
_hwafft_16pts = 0x00feff9f;
_hwafft_32pts = 0x00ff00f5;
_hwafft_64pts = 0x00ff03fe;
_hwafft_128pts = 0x00ff0593;
_hwafft_256pts = 0x00ff07a4;
_hwafft_512pts = 0x00ff09a2;
_hwafft_1024pts = 0x00ff0c1c;
The SD functions have been removed (they have worked in previous projects) , the array with the 1024 data points has also been removed . I’ve placed the data here: http://pastebin.com/tEWdQNq4
sdInit() is here: http://pastebin.com/G3mYtW7J
mmcConfigFs is here:
The main code is attached to this post
Any help is greatly appreciated!
You should check the allocation of your arrays like *scratch and *datatemp their alignment in memory. *scratch is just a pointer (needs memory allocated), *datatemp is not aligned in memory. Make sure they are allocated enough space and on a page boundary. You can see where these arrays are being placed by checking the .map file.
Also see the HWAFFT code for the C5505 eZdsp (wont run on C5535 but shows correct array declarations and alignment)
Hope this helps,Mark
In reply to Mark Mckeown:
Thanks for the reply, I'll be sure to try out your recommendations. I'll keep you posted on how it goes.
In reply to Sam Delacruz:
Hey Mark ( or anyone else!),
After many more attempts, I still haven’t been able to trigger an FFT. I’ve followed the recommendations in the preceding post (as best as I could, also looked at the suggested example) but I can’t seem to get it working.
My current code is here: http://pastebin.com/Wd32NW1G
The “.cmd” file is here: http://pastebin.com/VvJPKhwY
The “.map’ file is here :
Screenshot of the fft results using CCS graphing tool ( something graphs but it’s not correct).
Also, out_sel always seems to be 1 which indicates that the fft result is stored in the scratch buffer which is at address 0x2060
Any help is GREATLY appreciated.
The “.cmd” is here: http://pastebin.com/VvJPKhwY
According the FFT App Note:
"The data and scratch vectors must reside in separate blocks of RAM (DARAM or SARAM) to maximize memory bandwidth."
It looks like you are putting both of DARAM0. Maybe you should try putting one in DARAM0 and the other in DARAM1.
In reply to Jrvanho:
Have you made sure to un-idle the FFTHWA after boot?
Also, looking at the Errata:
"After hardware reset, on silicon Revision 2.2 C553x devices, the DSP boots via the bootloader code inROM. During the boot process, the bootloader queries each peripheral to determine if it can boot from theperipheral. At that time, the required peripheral’s clock will be enabled for the query and then disabledwhen the bootloader is finished with the peripheral. By the time the bootloader releases control to the usercode, all peripheral clocks will be off and all domains in the ICR, except the CPU domain, will be idled.After the boot process is complete, the user is responsible for enabling and programming the requiredclock configuration for the DSP.For example on the C5535 device, the bootloader disables both the MPORT and FFTHWA. To enable theMPORT and FFT HWA, write 0x000E to the ICR registers and issue an “idle” command."
Any updates? Have you managed to make hwafft work in ezdsp5535?
Are you using small or other (large) memory model?
In reply to Alex Lee3:
I would like to know as well, because it seems like there is a problem.It seems that the HWAFFT functions require a small memory model, but the CSL requires a large/huge memory model. Is there a workaround? Can I use the CSL as well as the HWAFFT functions?Thanks,Nate
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