Hello everyone,
I am working on bootloading the DSP via a host processor and the mcBsp0 module.
So far I have configured the SSI on the host side (the timing diagrams look fine) but I have some strange result when I try to upload the code to the 5502 DSP.
The bootmode is Standard Serial Boot Mode, I doubled check all the connections.
In the bootloader documentation they state that after every single word the DSP will drive GPIO4 high whilst it is busy and then put it back to low state.
In my case, GPIO4 is driven high at a very strange moment as it corresponds to the 4th bit of the 3rd word being sent... Then is will handshake regularly with the same interval.
I did a screenshot of the scope:
The top signal is GPIO, followed by the data line, chip select and clock of the mcBsp.
I programmed everything via CCS and my host model is ARM-M3.
Hey TI people it would be really nice if you could jump on that issue as it's been weeks I am posting on his forum without any reply from you.
I requested callbacks from TI and they don't seem to care neither.
This kind of issue obviously cost money to everyone so could you please help me/us on that hardware issue?
Just let me know if you need more detailed screenshot or whatever you require regarding this issue.
Thanks
Silvere
What is your serial port frequency (FSR) ratio in relationship to the CPU clock? The screenshot shows the GPIO4 responses in a fix interval to indicates a busy and ready to receives the next word again. Can you post a screenshot with the CPU clock?
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Thanks for your email Steve, I really appreciate.
Here is a screenshot of the CPU clock in relationship to the serial port frequency:
The FSR clock is at 35kHz in this example and the CPU clock a 5MHz...
I still don't understand what is wrong with my setup, I checked everything so many times, the clocks seem to be a good ratio. I tried many different frequencies.
Why are the acknowledges happening at those strange interval??
I really don't know what to do anymore.
I'm looking forward to you reply...
I managed to bootload via the UART as a temporary solution but I would require like TI people to find out what cause the acknowledgement of the data in SSI mode.
So you officially gave up on that problem right?