The increment of point value in arx

Gaojian Xu

Prodigy 130 points

Other Parts Discussed in Thread: TMS320VC5502, TMS320C5505

A section of assembly code for TMS320C5505 as below:

mpym *ar4+, ac0, ac1 ;
macm *ar4+, *(ar3+1),
macm *ar4+, *ar3, ac1 ;

The initial value of ar3 is 0, after excution of macm *ar4+, *(ar3+1)

What value should be in ar3 ? 0 or 1?

I think it should be 0. But I found it become 1 in debug.

over 9 years ago

0 Sivaraj Kuppuraj over 9 years ago

TI__Mastermind 35645 points

Hi,

Your request is taken up and will update you shortly.

Thanks & regards,

Sivaraj K

0 Gaojian Xu over 9 years ago in reply to Sivaraj Kuppuraj

Prodigy 130 points

Have got answer for my question?

Thanks.

0 Sivaraj Kuppuraj over 9 years ago in reply to Gaojian Xu

TI__Mastermind 35645 points

Hi,

Thanks for your update.

Kindly post your proposed workaround for your problem, so that, it would be useful for all other E2E community members who view this post.

Thanks & regards,

Sivaraj K

0 Gaojian Xu over 9 years ago in reply to Sivaraj Kuppuraj

Prodigy 130 points

I didn't get answer for that problem.

I wanted to ask "Have you got answer for my question?"

Input mistake. Sorry for your misunderstand.

0 Archaeologist over 9 years ago

TI__Guru* 84225 points

I can't make the assembler accept your example. The second instruction is missing an operand, and *(ar3+1) is not a valid C55x addressing mode. Please cut-and-paste the actual instruction you are trying to use into a forum post.

0 Gaojian Xu over 9 years ago in reply to Archaeologist

Prodigy 130 points

Thanks for your answer.

The actual code is as below:

mpym *ar4+, ac0, ac1 ;
macm *ar4+, *(ar3+t0), ac1 ;
macm *ar4+, *ar3, ac1 ;

t0 was assigned the value 1 before here.

What's the value in ar3 after the second instruction?

0 Archaeologist over 9 years ago in reply to Gaojian Xu

TI__Guru* 84225 points

You are correct, *(ar3+t0) is a post-incrementing addressing mode that should modify the value of ar3 to be ar3+t0 after the instruction executes.

Please make sure the C54CM bit is zero before this instruction gets executed, because when C54CM=1, the addressing mode is decoded as *(ar3+ar0), and will increment by the value of ar0. See Table 3-5 "DSP Mode Operands for the AR Indirect Addressing Mode" in the C55x v3.x CPU Mnemonic Instruction Set Reference Guide (SWPU067)