I2S with TLV320AIC3204

Hi,

I have a problema sending data via I2S with TLV320AIC3204.

I have configured audio codec with an input in IN1R as:

/* Configure AIC3204 */

    AIC3204_rset(  0, 0x00 );     

// Select page 0

    AIC3204_rset(  1, 0x01 );     

// Reset codec

    AIC3204_rset(  0, 0x01 );     

// Point to page 1

    AIC3204_rset(  1, 0x08 );     

// Disable crude AVDD generation from DVDD

    AIC3204_rset(  2, 0x00 );     

// Enable Analog Blocks

// PLL and Clocks config and Power Up

    AIC3204_rset(  0, 0x00 );     

// Select page 0

    AIC3204_rset( 27, 0x00 );     

// BCLK and WCLK is set as i/p to AIC3204(Slave)

    AIC3204_rset(  4, 0x07 );     

// PLL setting: PLLCLK <- BCLK and CODEC_CLKIN <-PLL CLK

    AIC3204_rset(  6, 0x20 );     

// PLL setting: J=32

    AIC3204_rset(  7, 0 );        

// PLL setting: HI_BYTE(D = 0)

    AIC3204_rset(  8, 0 );        

// PLL setting: LO_BYTE(D) = 0

// For 48 KHz sampling

AIC3204_rset(  5, 0x92 );     

// PLL setting: Power up PLL, P=1 and R=2

AIC3204_rset( 13, 0x00 );     

// Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling

AIC3204_rset( 14, 0x80 );     

// Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080

AIC3204_rset( 20, 0x80 );     

// AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6

AIC3204_rset( 11, 0x88 );     

// Power up NDAC and set NDAC value to 8

AIC3204_rset( 12, 0x82 );     

// Power up MDAC and set MDAC value to 2

    AIC3204_rset( 18, 0x88 );     

// Power up NADC and set NADC value to 8

    AIC3204_rset( 19, 0x82 );     

// Power up MADC and set MADC value to 2

// DAC ROUTING and Power Up

    AIC3204_rset(  0, 0x01 );     

// Select page 1

    AIC3204_rset( 12, 0x08 );     

// LDAC AFIR routed to HPL

    AIC3204_rset( 13, 0x08 );     

// RDAC AFIR routed to HPR

    AIC3204_rset(  0, 0x00 );     

// Select page 0

    AIC3204_rset( 64, 0x02 );     

// Left vol=right vol

    AIC3204_rset( 65, 0x00 );     

// Left DAC gain to 0dB VOL; Right tracks Left

    AIC3204_rset( 63, 0xd4 );     

// Power up left,right data paths and set channel

    AIC3204_rset(  0, 0x01 );     

// Select page 1

    AIC3204_rset( 16, 0x06 );     

// Unmute HPL , 6dB gain

    AIC3204_rset( 17, 0x06);     

// Unmute HPR , 6dB gain

    AIC3204_rset(  9, 0x30 );     

// Power up HPL,HPR

    AIC3204_rset(  0, 0x00 );     

// Select page 0

    wait( 500 );        

// Wait

// ADC ROUTING and Power Up

    AIC3204_rset(  0, 0x01 );     

// Select page 1

    AIC3204_rset( 52, 0x00 );     

// STEREO 1 Jack

// IN1_L not routing to LADC_P

    AIC3204_rset( 55, 0xC0 );     

// IN1_R to RADC_P through 40 kohmm

    AIC3204_rset( 54, 0x03 );     

// CM_1 (common mode) to LADC_M through 40 kohm

    AIC3204_rset( 57, 0xC0 );     

// CM_1 (common mode) to RADC_M through 40 kohm

    AIC3204_rset( 59, 0x0f );     

// MIC_PGA_L unmute

    AIC3204_rset( 60, 0x0f );     

// MIC_PGA_R unmute

    AIC3204_rset(  0, 0x00 );     

// Select page 0

    AIC3204_rset( 81, 0xc0 );     

// Powerup Left and Right ADC

    AIC3204_rset( 82, 0x00 );     

// Unmute Left and Right ADC

    AIC3204_rset( 0,  0x00 );   

    wait( 200 ); 

// Wait

And configured I2S2 as:

void

Init_I2S2(void)

{

//I2S2_SRATE = 0x0015; //FS divider by 32 and CLK by 64

I2S2_SRATE = 0x0014;

//FS divider by 32 and CLK by 32

I2S2_INTMASK = 0x0028;

I2S2_SCTRL = 0x8012;

//Enable I2S, Stereo Mode, 16bit word and Master mode

}

I can see WS and BCLK as I want. However DX and RX are not sending nothing. I have an audio signal in IN1R.

I have tested it in EVM5515 and is working. The only difference that i see is that in EVM seems like if there is a pull up in DX, however i can't see anyone in schematics.

It is necessary a pull up in DX?

Thanks