Hi community member,
Please let me confirm the following question/
[Question]
According to the following application note, C5535 support the boot via SPI Flash .
http://www.tij.co.jp/jp/lit/an/sprabl7b/sprabl7b.pdf
And the SPI Flash must support at least a 500-kHz SPI clock. Refer to the datasheet, the maximum spi_clk is 25MHz.
Does the maximum rate of SPI_CLK support during boot? Would you please teach me the expected maximum transfer rate of SPI Flash on boot stage?
If you have any question, please let me know.
Best regards.
Kaka