c5535 boot from PC using UartBoot.exe

Hi,

cleaner.bin is to erase boot image content in NOR, NAND, I2C (EEPROM) and SPI (FLASH/EEPROM);

Which hardware are you using ? is this your custom board?

can you try with other simple boot program like xf_blink (Attached here) and see whether this works.

Regards

Vasanthxf_blink_3.bin

Thanks Vasanth,

I was trying with a custom baord. But I don't see any change in the behaviour with the Spectrum Digital EVM also. Both cases it says error in sending the file 0!=2.

I tried with the bin file given by upu and it is getting loaded. But my bin file is not getting loaded by the uartboot.exe.

What could be the issue here..?

I have attached the bin file for your reference. Please see what is the issue here.

Do we have any source code for this uartboot.exe file..?

The bin file given by u or the cleaner.bin are just around 2KB in size. Mine is 223 KB. Is the file size and issue..?

Same bin file if I try to load it to flash through the programmer.out file from CCS, it gets loaded and the board gets booted with my image and my program also runs fine without any issue. But the Uartboot.exe fails to load it. 

Do we have to convert to bin file in any different manner to be used with uartboot.exe..?

Regards,

Ashok

slicDsp.rar

Today I wrote my own python script which opens a com port with appropriate serial post settings, opens the binary image, reads the image content byte by byte and puts it on the serial port.

With this python script, when I tried either cleaner.bin or the xf_blink_3.bin, it wrote successfully. But when I tried my image slicDsp.bin (which is of length 223KB), it is getting stuck at 3587th byte.

Is there any length restriction on sending the bootable image via UART..?

Can get the source code for UARTBOOT.exe..?

Regards,
Ashok

Hi Ashok,

I do not think there is any length restriction on sending the boot image via UART. The only limitation will be the SARAM / SDRAM (external memory) size.

With respect to UARTboot.exe source code, suggest you to contact local TI FAE. They should help you with this.

Regards

 Vasanth

Hi Vasanth,

I have taken care not to use the SARAM31 (byte address 0x4E000 – 0x4FFFF) area which according to the bootloader document is reserved for boot loader operation. So what exactly you mean by SARAM size limitation..? Can you be a bit more elaborate on this..?

Why is the same image works fine when booted with SPI FLASH and not when booted with UART..?

We have contacted the local FAE's also but have not got any response from them about the issue.

Regards,

Ashok 

zero.rarHi Vasanth,

I have created 2 binary files which have only zeros in it.

"zero3586.bin" containing 3586 bytes of 0's  and "zero3587.bin" containing 3587 bytes of 0's.

Whether I use the uartboot.exe or the python script which I wrote, both load the "zero3586.bin" but fail to load "zero3587.bin".  I don't have the basic boot signature also in these files. This clearly is pointing to some size restriction in the UART boot mode.

I request you to try the attached binary files and confirm.

Thanks & regards,

Ashok

Hi Ashok,

I do not have the right C5535 hardware to connect to UART( only have C5535 eZDSP). So what I did is, I tried the bin files provided on C5517 device  and I was able to boot from both the bin files sucessfully using PC application - UARTboot.exe. The baud rate set was 57600.

Atleast from this excercise looks like there is no issue (limitation on size) with uartboot.exe file.  

You could try follow the below steps and check again.

• Clean up all the boot image from all the supported bootloading peripherals prior to UART.
• Boot image cleanup can be performed using cleaner.bin file.
• Set the right baud rate and other UART parameters
• Boot from UART again and check whether  transfer of image to internal memory is sucessful.

Since you are able to boot the same image from SPI, then I think there is no  issue with respect to SARAM size.

Regards

 Vasanth

 

Hi Vasanth,

I too have the Spectrum Digital 5535 eZDSP board. I have already tried many number of times all the steps what you have mentioned above. But I'm not successful. Becoming kind of desperate now.

Regards,

Ashok

Hi Ashok,

Could you let me know how you were able to transfer data to UART using C5535 eZDSP,  are you transfering through edge connector ?

Is it possible to share your original bin file. The one which you had shared yesterday looks to be ok and could not find any issues?

Regards

 Vasanth

 

Hi Vasanth,

I use the connector J2 on the ezDsp board which acts both as the JTAG and UART port via the FDTI chip. 

Please find attached the original bin file for your reference.

Thanks & Regards,

Ashok

3286.slicDsp.rar

This connector J2 has 2 ports. XDS100v2 emulator port A and Port B. Port A acts as the JTAG and port B acts as the UART port.

Thanks a lot Vasanth fr all the help. Finally I could get it loaded successfully by making the SPI CS to off position on SW3 on the eZdsp.

And we tried in our custom board too by disabling the SPI chip select and it worked there too...:-)

Thanks & regards,
Ashok

But have one more issue. The load time of close to 43 seconds is too much for us.

When the DSP is capable of much higher speed on UART, why is that the boot loader is restricted to 57600 bps..?

How can we change this to higher speed so that we can achieve this boot loading in lesser time..?

Is there a possibility to get the source code of the boot loader..?

Or some one can change the boot loader to take the higher speeds and remove the parity bits and give us..?

Or is there any other better options to achieve a faster boot that you could suggest..?

Thanks & Regards,
Ashok

Good to Know that UART transfer worked.

With respect to your question on UART Baud rate - this will be based on the initial clock settings etc, the UART baud rate would get derived.

Also, even if clock frequency (CLK IN) changed to11.2896MHz it could result in data error.   Here is the excerpt from bootloader application note -  " Note that this setup may result in data receive errors if CLK_SEL is set to use CLKIN when CLKIN is 11.2896 MHz. The error rate may be reduced by the external device by adding additional time between frames (bytes)."

W.r.t  bootloader - As bootloader is part of on-chip ROM having source code wouldn't help. Though there exists a feature for setting up peripheral  registers prior to loading code through Register configuration ( refer to  SPRABL7B section 2.3 Register Configuration) you may need to further check based on your requirements & configurations. Suggest you to go through the "Notes" mentioned in this section (2.3) aswell.

Hope this clarifies.

Regards

 Vasanth

Thanks Vasanth. So in effect the document warns not to modify the registers otherwise the boot loader may not work properly.

What is the initial clock settings on power up..? Where can I get this information..?

Some one is suggesting to have an intermediate boot loader in SPI flash which configures the UART for proper baud rate and loads the actual boot image from UART. Is this a good idea..? Any example of the boot loader code..? What all I should take care..? how to write a boot loader code..? What all should be taken care..?

How do I jump to the beginning of my code after loading the boot image..?

Regards,
Ashok

Thanks a lot Vasanth...

The links provided by you helped me out. I was able to load my image successfully through the secondary boot loader with higher baud rate. 

Regards,

Ashok