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evmc5517 using audio codec 254

Other Parts Discussed in Thread: TLV320AIC3204

Hello all,

I'm using the evmc5517. I'm having some troubles using the audio codec, I want to have a sound path in1->adc->dac->HP, without having to use the bus I2S on the board. I asked the group of data converters and codecs () ,

and I was redirected to this forum. The scriot is working great on the other boards but not on the evmc5517. All jumpers and switches are on default mode, but still doesn't work.

Could someone help me?

Thank you in advance

ip

  • Hi,

      Could you elaborate on your requirements. You meant you would not use the I2S on C5517 EVM ? 

    Regards

     Vasanth

     

  • Hi,

    First of all, thank you for your help.

    Yes, in this case, I would like to use just input sound to in1->adc->dac->HL/HP, in direct loop configuration, without using the C5517. So, without using the I2S.

    The C5517 is used just for codec register configuration, and then, I want that the minidsp embedded in the codec do the filtering and all the signal processing, without C5517 intervention, which is busy doing other kind of processing. So, codec must stand-alone, with the previous script.

    Any ideas why is it not working?

    Best Regards,

    ip

  • ( Data Converters sent me here because script should work, they say it should be something about board configuration i'm missing)
  • And here the configuration of the Codec :

    /* Configure AIC3204 */
    AIC3204_rset( 0, 0x00 ); // Select page 0
    AIC3204_rset( 1, 0x01 ); // Reset codec


    /* PLL and Clocks config and Power Up */
    /// Texas Instruments

    AIC3204_rset( 0, 0x00 ); // Select page 0

    AIC3204_rset( 18, 0x81 );
    AIC3204_rset( 19, 0x82 );

    AIC3204_rset( 11, 0x81 );
    AIC3204_rset( 12, 0x82 );

    /* Signal Processing Settings */
    AIC3204_rset( 0, 0x00 ); // Select page 0

    AIC3204_rset( 61, 0x01 );

    AIC3204_rset( 60, 0x08 );

    /* Configure Power Supplies */

    AIC3204_rset( 0, 0x01 ); // Select page 1

    AIC3204_rset( 1, 0x08 ); /// Disable weak AVDD in presence of external
    AIC3204_rset( 2, 0x00 ); /// Enable Master Analog Power Control Power up AVDD LDO
    AIC3204_rset( 61, 0x00 );

    AIC3204_rset( 71, 0x32 ); /// Set the input power-up time to 3.1ms (for ADC)
    AIC3204_rset( 123, 0x01 ); /// # Set the REF charging time to 40ms

    /// Recording Set Up
    AIC3204_rset( 0, 0x01 ); // Select page 1
    AIC3204_rset( 52, 0x80 ); /// Route IN1L to LEFT_P with 20K input impedance
    AIC3204_rset( 54, 0x80 ); ///Route Common Mode to LEFT_M with impedance of 20K
    AIC3204_rset( 55, 0x80 ); ///Route IN1R to RIGHT_P with input impedance of 20K
    AIC3204_rset( 57, 0x80 ); ///Route Common Mode to RIGHT_M with impedance of 20K


    AIC3204_rset( 59, 0x0c ); ///# Unmute Left MICPGA, Gain selection of 6dB to make channel gain 0dB
    ///# Register of 6dB with input impedance of 20K => Channel Gain of 0dB
    AIC3204_rset( 60, 0x0c ); /// Unmute Right MICPGA, Gain selection of 6dB to make channel gain 0dB
    ///# Register of 6dB with input impedance of 20K => Channel Gain of 0dB


    AIC3204_rset( 0, 0x00 ); // Select page 0
    AIC3204_rset( 81, 0xc0 ); /// Power up LADC/RADC
    AIC3204_rset( 82, 0x00 ); /// Unmute LADC/RADC

    /*Playback Setup */
    AIC3204_rset( 0, 0x01 ); // Select page 1
    AIC3204_rset( 20, 0x25 ); /// De-pop: 16 time constants, 6k resistance
    AIC3204_rset( 12, 0x08 ); ///Route LDAC/RDAC to HPL/HPR
    AIC3204_rset( 13, 0x08 );
    AIC3204_rset( 9, 0x30 ); ///Power up HPL/HPR and LOL/LOR drivers
    AIC3204_rset( 16, 0x00 ); ///Unmute HPL/HPR driver, 0dB Gain
    AIC3204_rset( 17, 0x00 );

    AIC3204_rset( 0, 0x00 ); ///Select Page 0
    AIC3204_rset( 65, 0x00 ); /// DAC => 0dB
    AIC3204_rset( 66, 0x00 ); /// DAC => 0dB

    AIC3204_rset( 63, 0xd6 ); /// Power up LDAC/RDAC
    AIC3204_rset( 64, 0x00 ); /// Unmute LDAC/RDAC

    AIC3204_rset( 0, 0x00 ); ///Select Page 0
    AIC3204_rset( 29, 0x10 ); /// Digital LoopBack ADC out - > DAC in

    This configuration script on the aic3254 evm  (tlv320aic3204_54_RHB_EVM) is working well.

  • Hi,

     The configuration of Codecs using C5517 device in C5517 EVM will be through I2C.

     There are examples in CSL package which will help you guide configuring the codec.

     CSL examples are downloadable from link  http://www.ti.com/tool/sprc133  - install  C55XCSL-C5517-AUXPACK : CSL_I2S_AudioCodec_DMA example will have  Codec configuration details. Refer to csl_i2c_ioExpander.c

     The details mentioned above is to configure codec through C5517, if you need to use scripts then the approach has to be different and might call for few minor EVM modifications (related to codec).

     Hope this information helps.

     Regards

     Vasanth

  • Hello,

    First of all, thanks for your help.

    My question was not related with your answer. I already know that i2c is used, and those examples.

    My question is about my specific configuration, which is not included in none of the examples, and why it is not working.

    The configuration i said is working with other boards, but not with c5517 evm. The question is why, or if you prefer, how should I use this board for using the codec in direct sound path configuration in1->adc->dac->hlp without using i2s.

    Best Regards

    ip

  • Hi,

    Thanks for clarifying on the approach that you are following is similar to CSL example (that is using I2C & IO expander). Hope you have confirmed the correctness of configuration too.

    Let me check with codec experts and get back to you.

    Regards

     Vasanth

  • Hi,

    Lets check that the board is in a state to provide clock and power to the CODEC.
    First, focus on using only AIC0 U19 / top codec/ closest to CLKOUT SMA
    Do you have the ability to probe some signals with an oscilloscope?

    Clock
    Ensure JP12 = 1-2 position (MCLK = 12MHz crystal)
    Is OSC1 populated with 12MHz crystal?

    Power
    Check SW6 DIP pins 3 and 4 both ON/ right side/ closest to J15
    VDD_IO1 = 3.3V

    IO Expander (pins default as inputs, controlled by pull-ups/ pull-downs) - leave as default
    P00 = AIC_RST (default = LOW - NPN BJT is OPEN/off - AIC3204_RST = HIGH - codec out of reset)
    P03 = SEL_I2C_S1 (default = LOW - I2C routed to AIC0 U19 / top codec/ closest to CLKOUT SMA)
    P02 = SEL_I2C_S0 (default = LOW - I2C routed to AIC0 U19 / top codec/ closest to CLKOUT SMA)
    Leave IO expander in default state - I2C routed to AIC0 U19 / top codec/ closest to CLKOUT SMA, both codecs out of reset

    Scope tests
    Probe R211 - MCLK - should see 12MHz clock from 3.3V to 0V when board is powered
    Probe R460 and R461 - I2C to AIC0 U19 / top codec/ closest to CLKOUT SMA - should see toggling during I2C writes from 3.3V to 0V (100kHz - 400 kHz on SCL)

    Debugging
    Run C5517 CSL CSL_I2S_AudioCodec_DMA example - C55XCSL-C5517-AUXPACK\c55xx_csl\ccs_v5.0_examples\i2s\CSL_I2S_AudioCodec_DMA
    - get C55XCSL-C5517-AUXPACK from http://www.ti.com/tool/sprc133

    Questions
    What is the source of the audio signal? Phone/ MP3 player headphone jack? PC Line out? Microphones require configuring MIC_BIAS
    Are you able to play audio using the CSL Codec example? (Check board is configured and functional)
    How are you configuring the C5517 clock? Using a GEL file? What is printed on the console? 100Mhz? 120MHz?

    I briefly checked your reg settings
    Regs look good - particularly AIC3204_rset( 2, 0x00 ); /// Enable Master Analog Power Control Power up AVDD LDO - comment wrong: actually powers down AVDD LDO (correct on C5517 since DVDD and AVDD are supplied by 1.8V)

    Hope this helps,
    Mark
  • Hello,

    First of all, thanks for your help and time.

    I have made all the checks of the list, and everything is as you described

    I have used a phone and a pc line out. The board is configured and functional, there is no problems to play music or make loops from computer when I use the i2s port. The problem comes always when I try to avoid the use of i2s or the direct analog loop from in1. 

    So when I try to use my codec without i2s data path, just direct data path in1->adc>dac>hlp, it is not working on this board. So my problem persists

    ip

  • Hello Mark,
    Can you please have a look at the Customer feedback and provide an answer? Thanks, Beatriz.
  • Some comments:
    a) Regarding the register settings can you make a dump of all the registers? By making a dump I mean read all the registers one by one using rget() and post it on this forum thread.
    The idea is to check register by register (and bit by bit) that the config (you read with rget()) is actually what you think that was written by rset().

    b) Can you post as well a dump of all the register using a working configuration (ie using a processor where your setup works)?
    The idea is to compare the register settings in both scenario to check it is 100% identical.

    I think it should help to narrow down the issue to the processor side or the CODEC side.

    A.