I am using CCS V4.2.2 and mu configuration is C55xx Rev2.x CPU Cycle Accurate Simulator/TMS320C55x. My linker command file is :
-stack 0x2000 /* Primary stack size */
-sysstack 0x1000 /* Secondary stack size */
-cr /* Use C linking conventions: auto-init vars at runtime */
-m C:maps\mapFile.txt
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
PAGE 0: /* ---- Unified Program/Data Address Space ---- */
MMR (RWIX): origin = 0x000000, length = 0x0000c0 /* MMRs */
DARAM0 (RWIX): origin = 0x0000c0, length = 0x00ff40 /* 64KB - MMRs */
SARAM0 (RWIX): origin = 0x010000, length = 0x010000 /* 64KB */
SARAM1 (RWIX): origin = 0x020000, length = 0x020000 /* 128KB */
SARAM2 (RWIX): origin = 0x040000, length = 0x00FE00 /* 64KB */
VECS (RWIX): origin = 0x04FE00, length = 0x000200 /* 512B */
}
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
.text >> SARAM1
/* Both stacks must be on same physical memory page */
.stack > DARAM0 /* Primary system stack */
.sysstack > DARAM0 /* Secondary system stack */
.data >> DARAM0|SARAM0|SARAM1 /* Initialized vars */
.bss >> DARAM0|SARAM0|SARAM1 /* Global & static vars */
.const >> DARAM0|SARAM0|SARAM2 /* Constant data */
.sysmem > DARAM0|SARAM0|SARAM2 /* Dynamic memory (malloc) */
.switch > SARAM2 /* Switch statement tables */
.cinit > SARAM2 /* Auto-initialization tables */
.pinit > SARAM2 /* Initialization fn tables */
.cio > SARAM2 /* C I/O buffers */
.args > SARAM2 /* Arguments to main() */
.vectors > VECS /* Interrupt vectors */
}
which is an example I saw on the web.
My question : Is this a valid memory system given that I am running in device simulation mode?
Where can I find documentation on this?
I am seeing some instability during execution. I want to confirm that my configuration is fundamentally correct.
