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C5545 SPI TX/RX driven hi-z in software?

Question on behalf of a customer

We are using a TMS3205545A chip whose SPI bus is connected to an external flash chip and another processor. When I try to access the flash chip via the other processor I am not able to do so as the SPI_RX and SPI_TX lines of the TI processor are held high by the TI processor. I tried to put the TI chip in reset but it still drives the line to a high.

 

Is there some way in which the SPI bus lines could be driven to a Hi-Z (Impedance state) in the code?

 

The only means of doing this is via JTAG commands, not sure this can be executed from the code

 

  • There was a similar query on the E2E: e2e.ti.com/.../1779978
    They reported that the LCD_D[1]/SPI_TX pin goes Hi-Z after a SPI transfer with EBSR still configured as SPI (MODE1). This was a problem for them as the DVDDIO power went up due to a floating input. We confirmed that SPI_TX goes hi-z after SPI transfers are completed and we also verified in RTL and by experimentation that SPI_TX would only stay driven if the character count bits (CCNT) of SPISTAT2 is non-zero - i.e. mid-transfer. Refer to 8.2.9 Monitoring SPI Activity of SPRUH87

    Can you confirm these are the SPI pins under question:
    TMS320C5545 SPI connected to following pins/ BGA balls when EBSR PPMODE = MODE 1 or MODE 6...
    SPI_RX = ball A4 = LCD_D[0]/SPI_RX
    SPI_TX = ball C2 = LCD_D[1]/SPI_TX
    SPI_CLK = ball A1 = LCD_EN_RDB/SPI_CLK
    SPI_CS0 = ball A2 = LCD_CS0_E0/SPI_CS0
    SPI_CS3 = ball A3 = LCD_RS/SPI_CS3

    "I tried to put the TI chip in reset but it still drives the line to a high"
    According to 5.6.9.2 Pin Behavior at Reset in the C5545 Datasheet, these pins should be Hi-Z when the chip is in RESET. I will re-verify this with hardware though. Are all of the C5545 supplies powered? Can you rule out the possibility of some other device driving the SPI_TX and SPI_RX signals? Are all other chip selects high at this time - ie no bus contention?

    Software can run on the DSP to configure the EBSR PPMODE pinmux to MODE1 or MODE6, then reset the SPI peripheral. I think it should default into the Hi-Z state. If not, we proved that at least SPI_TX goes Hi-Z after a transaction is completed. We will have to check if SPI_RX behaves the same way.

    There may be an alternate software solution where we set the EBSR PPMODE pinmux to LCD_D[0] and LCD_D[1] - and then use the LCD peripheral to make these pins inputs. Lets keep this one in the back pocket for now.

    Regards,
    Mark