CCS/C55XCODECS: C5517 Target configuration is not connected

Hi Rio,

I've forwarded this to the c55x experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

Hi .
I can load the program right now.
But , the issue comes, please see the below log msg.
Please send me the correct "CCXML file" + correct "GEL" file to make the Audio Beanforming demo.

There are bunch of ccxml / gel in the CSL 3.0.7, but, I have tried some how.
Still not working properly.

THanks,
BR Rio




Audio Pre-processing Demo for C5517 EVM with CMB
This Demo Will Continuously Get Audio Input from CMB, Process the Audio Using BF+ASNR+MSS, then
Send the Processed Audio to the Left Channel of the On-Board Codec (AIC3204-2)
Bypass Audio Input from Mic2 of CMB to the Right Channel of the On-Board Codec

Please Connect the Headphone to the Audio Output (Headphone) Jack (P9)

I2S2 Module Instance opened successfully
I2S2 Module Configured successfully
I2S3 Module Instance opened successfully
I2S3 Module Configured successfully
I2S0 Module Instance opened successfully
I2S0 Module Configured successfully
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
bf required buffers:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x0
1 138 0 no 0x0
2 144 0 no 0x0
3 184 1 yes 0x0
4 320 1 yes 0x0
Buffers allocated by SIU for bf:
Buffer Size(twords) Alignment Volatile address
0 82 1 no 0x1
1 138 0 no 0x1
2 144 0 no 0x1
3 184 1 yes 0x1
4 320 1 yes 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
Buffers requested by NR:
Buffer Size(twords) Alignment Volatile
0 44 1 no
1 774 1 yes
2 516 1 yes
3 387 1 yes
4 192 1 no
5 516 1 no
6 14 1 no
Buffers allocated for NR:
Buffer Size(twords) Alignment Volatile address
0 88 3 no 0x1
1 1552 3 yes 0x1
2 1032 3 yes 0x1
3 776 3 yes 0x1
4 384 2 no 0x1
5 1032 2 no 0x1
6 32 3 no 0x1
MSS required buffers:
Buffer Size(twords) Alignment Volatile address
0 122 1 no 0x0
Buffers allocated by SIU for MSS:
Buffer Size(twords) Alignment Volatile address
0 220 1 no 0x1
...Initializing DRC
Not enough heap, exiting
BR Rio

Hi all:
Set as the 4 mics in the codec_pcm_186x.h will solve this issue.
Because the 6 mics will cause the heap not enough.

BR Rio

Hi Rio
Thank you for sharing your step guide with helper steps and videos, it should benefit other users.

I will ask Lalindra Jayatilleke to review this to see if any of this needs to be added to our wikis or ti.com collateral.

Please let us know if you have additional feedback on collateral updates /enhancements needed to make this a better out of box experience.

Regards
Mukul