TMS320C5505: Questions about EMF of C5505

Hi DA,

Some answers for you...

da said:

q1
There is a signal that becomes Hi - z by the EMIF signal. (For example EM_SDCLK)
Will these signals become Hiz when it is in the band scan and when the power of the DVDDEMIF is turned off?

I don't believe the EM_SDCLK is ever Hi-Z.
 - In reset, it is in the low group (See SPRS660F section 5.7.3 Pin Behavior at Reset).
 - When it is disabled by setting SDCLK_EN bit low in the Clock Configuration register 1 (CCR1) 0x1C1E (See SPRUGH5B Section 1.4.4.5)
 - When the clock to the EMIF module is gated with the Peripheral Clock Gating Configuration Register 1 (PCGCR1), it is driven either high or low (unless you first disabled it with SDCLK_EN - then it is driven low) (See SPRUGH5B section 1.5.3.2.1 Peripheral Clock Gating Configuration Registers (PCGCR1))
 Note that you must always request to stop the EMIF clock with the EMFCLKSTPREQ bit then wait for the ack bit EMFCLKSTPACK in the CLKSTOP register (See SPRUGH5B Section 1.5.3.2.2 Peripheral Clock Stop Request/Acknowledge Register (CLKSTOP) [1C3Ah])
 - When the supply of DVDDEMIF is shorted to GND, the supply to the p-channel of the IO is shorted to GND and the back body diode drain any voltage on the output to GND through a forward voltage drop. Further, the N-channel of the IO buffer will short the output pin to GND if its gate (input to the buffer) is high. So the output will either be at GND or slightly above GND, but never floating up to DVDD.

If you do not need the EMIF, the recommendation is...
1) to short at least one DVDDEMIF supply pin (ball) to GND
2) to keep all signal pins supplied by DVDDEMIF, regardless of pin mux options, must be either floating or shorted to GND.

Refer to this wiki: http://processors.wiki.ti.com/index.php/C5505/15/35_Schematic_Checklist#If_EMIF_is_not_used

I probed the SDCLK at R159 on the C5515 EVM to prove these findings to be true.

da said:

q2
Is it OK to recognize that these states do not change when these control signals do not use EMIF?

Yes, when DVDDEMIF is shorted to GND all signal pins supplied by DVDDEMIF will be low.

da said:

q3
Is there a way to fix the data bus (EM_D [15: 0]) with software?

Yes, if the DVDDEMIF supply is not GNDed, then you can control the data pins with software. They will output the most recent state that was written to them with the data bus parking feature. You should configure EMIF, write the same state to the data lines for a couple consecutive words, then you may disable the with the SDCLK_EN bit, then request EMIF clock to be stopped, and then stop the EMIF clock. The data  you wrote will remain driven on the EM_D[15:0] pins (except when performing an asynchronous read operation - see below...)

See SPRUGU6B Section 1.2.9 Data Bus Parking - The EMIF always drives the data bus to the previous write data value when it is idle. This feature is called data bus parking. Only when the EMIF issues a read command to the external memory does it stop driving the data bus. After the EMIF latches the last read data, it immediately parks the data bus again. The one exception to this behavior occurs after performing an asynchronous read operation while the EMIF is in the self-refresh state. In this situation, the read operation is not followed by the EMIF parking the data bus, instead the EMIF tri-states the data bus. Therefore, it is not recommended to perform asynchronous read operations while the EMIF is in the self-refresh state, in order to prevent floating inputs on the data bus. External pull-up or pull-down resistors should be placed on the EMIF data bus pins if it is required to perform reads in this situation. The precise resistor value should be chosen so that the worst case combined off-state leakage currents do not cause the voltage levels on the associated pins to drop below the high-level input voltage requirement.
More information about the self-refresh state can be found in SPRUGU6B Section 1.2.6.7.

Hope this helps,
Mark