• Resolved

TMS320VC5509A: SDRAM write large buffer problem.

Part Number: TMS320VC5509A

hi. I have a problem with my board HX-5509a. when I write to SDRAM in range of 0x10000, I could write and data in SDRAM is correct. but when I increase the size of buffer the data is not correct and stuck in the loop.

any suggestion? here is the code ( the program stuck in  first while):

#include <csl.h>
#include <csl_pll.h>
#include <csl_emif.h>
#include <csl_chip.h>

Uint16 x;
Uint32 y;
CSLBool b;
long int datacount = 0;
int databuffer[1000] ={0};
int *souraddr,*deminaddr;

PLL_Config myConfig = {
0, //IAI: the PLL locks using the same process that was underway 
//before the idle mode was entered
1, //IOB: If the PLL indicates a break in the phase lock, 
//it switches to its bypass mode and restarts the PLL phase-locking 
//sequence
24, //PLL multiply value; multiply 24 times
1 //Divide by 2 PLL divide value; it can be either PLL divide value
//(when PLL is enabled), or Bypass-mode divide value
//(PLL in bypass mode, if PLL multiply value is set to 1)
};


EMIF_Config emiffig = {
0x221, //EGCR : the MEMFREQ = 00,the clock for the memory is equal to cpu frequence
// the WPE = 0 ,forbiden the writing posting when we debug the EMIF
// the MEMCEN = 1,the memory clock is reflected on the CLKMEM pin
// the NOHOLD = 1,HOLD requests are not recognized by the EMIF 
0xFFFF, //EMI_RST: any write to this register resets the EMIF state machine
0x3FFF, //CE0_1: CE0 space control register 1
// MTYPE = 011,Synchronous DRAM(SDRAM),16-bit data bus width
0xFFFF, //CE0_2: CE0 space control register 2
0x00FF, //CE0_3: CE0 space control register 3
// TIMEOUT = 0xFF;
0x3FFF, //CE1_1: CE0 space control register 1
0xFFFF, //CE1_2: CE0 space control register 2
0x00FF, //CE1_3: CE0 space control register 3

0x3FFF, //CE2_1: CE0 space control register 1
0xFFFF, //CE2_2: CE0 space control register 2
0x00FF, //CE2_3: CE0 space control register 3

0x7FFF, //CE3_1: CE0 space control register 1
0xFFFF, //CE3_2: CE0 space control register 2
0x00FF, //CE3_3: CE0 space control register 3

0x2911, //SDC1: SDRAM control register 1
// TRC = 8 
// SDSIZE = 0;SDWID = 0
// RFEN = 1
// TRCD = 2
// TRP = 2
0x0410, //SDPER : SDRAM period register
// 7ns *4096
0x07FF, //SDINIT: SDRAM initialization register
// any write to this register to init the all CE spaces,
// do it after hardware reset or power up the C55x device
0x0131 //SDC2: SDRAM control register 2
// SDACC = 0;
// TMRD = 01;
// TRAS = 0101;
// TACTV2ACTV = 0001; 
};


main()
{
CSL_init();

CHIP_RSET(XBSR,0x0a01);
PLL_config(&myConfig);
EMIF_config(&emiffig);
int i = 0;

souraddr = (int *)0x0250000;
deminaddr = (int *)0x0260000;
long int s = 100000;
for(i=0;i<1000;i++)
databuffer[i]=0;
while(datacount<s)
{
*souraddr++ = 999;
//datacount++ ;
}

souraddr = (int *)0x0250000;
datacount = 0;
while(souraddr<deminaddr)
{
databuffer[datacount++] = *souraddr++;
}
while(1);
}