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TMS320VC5509A: some issue about TMS320VC5509AGHH

user5195014
Intellectual 450 points
Part Number: TMS320VC5509A

Dears

There are threes parts in my design .Power(TPS767D301)  MCU(STM32F103) DSP(TMS320VC5509AGHH).

1.Does it ok that DSP Pin TRST and Pin Reset connect together? 

2.Does it  ok that DSP Pin(TRST RESET) connect with Power Reset Pin.?

  • 0
    TI__Mastermind 29180 points

    Hi,

    I see your RESET signal is driven by the MCU.

    I will ask if it is okay to tie both TRST and Reset together. It may be okay.

    How have you connected the EMU1 and EMU0 pins? They will be latched on the TRST rising edge. To avoid entering a JTAG test mode, they should both be at logic high.

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    Intellectual 450 points
    Dears
    Others issue
    1.The PA1 pin of MCU is used to generate a square wave with 50% sapce ratio then this frequency is giving the X2/CLKIN pin of DSP as the DSP clock source,Can DSP work normal or what will happen?
    2.Is there an EHPI interface driver for TMS320VC5509AGHH
    3.Does several interrupt pins of TMS320VC5509AGHH support edge and level triggering
    4.The input high level of the X2/CLKIN pin of TMS320VC5509AGHH is 1.6V, or 3.3V
  • 0 in reply to user5195014
    TI__Guru**** 168297 points
    Hi,

    >> I will ask if it is okay to tie both TRST and Reset together. It may be okay.
    I see a few problems with this approach:
    - the TRST is an output signal from the Debug Probe - you need to tie resistors to prevent clashing outputs
    software-dl.ti.com/.../emu_xds_target_connection_guide.html
    - if you need to debug through reset conditions or low power run (something that surely works in C6000 devices but I am not so sure in a VC5509A), the TRST may block this as the JTAG state machine will be reset.

    Hope this helps,
    Rafael
  • 0 in reply to desouza
    TI__Mastermind 29180 points
    Thanks Rafael,

    To close the other questions...

    1.The PA1 pin of MCU is used to generate a square wave with 50% sapce ratio then this frequency is giving the X2/CLKIN pin of DSP as the DSP clock source,Can DSP work normal or what will happen?

    Yes, this can work. Refer to Table 5-2. CLKIN Timing Requirements in the TMS320VC5509A datasheet for the requirements. This device utilizes a fully static design and therefore can operate with clockin period approaching infinity. The min period for CLKIN is 20ns (50MHz). Rise and fall time must be less than 4ns. Clock pulse duration must be at least 6ns.
    CLKIN is realtive to the DVDD IO supply.

    2.Is there an EHPI interface driver for TMS320VC5509AGHH

    The chip support library supports HPI, but I am not finding any examples that use the driver unfortunately.
    Find the CSL API at http://www.ti.com/tool/sprc133 (C55XCSL-SPRC133)
    H file: C:\Program Files\C55xxCSL\include\csl_hpi.h
    Lib file: C:\Program Files\C55xxCSL\lib

    3.Does several interrupt pins of TMS320VC5509AGHH support edge and level triggering
    there are 5 interrupt pins INT4 to INT0. Each are edge triggered, but the high to low transition must be sampled by multiple CPU clock cycles.
    The external interrupts (INT[4:0]) are synchronized to the CPU by way of a two-flip-flop synchronizer. The interrupt inputs are sampled on falling edges of the CPU clock. A sequence of 1-1-0-0-0 on consecutive cycles on the interrupt pin is required for an interrupt to be detected. Therefore, the minimum low pulse duration on the external interrupts on the 5509A is three CPU clock periods.
    Refer to 3.11.2 Interrupt Timing in the datasheet

    4.The input high level of the X2/CLKIN pin of TMS320VC5509AGHH is 1.6V, or 3.3V

    3.3V (2.7V to 3.6V according to the Recommended Operating Conditions table see 5.2.1, 5.2.2, & 5.2.3 in the datasheet)

    Hope this helps,
    Mark
  • 0 in reply to Mark Mckeown
    Prodigy 20 points
    Dears
    Many Thanks
  • 0 in reply to user4936578
    Intellectual 450 points
    1.There is a working TMS320VC5509A board. Although the CLKOUT pin of DSP outputs 138MHz clock, the amplitude (peak value) of clock is within 1V, not 3.3v, why?Please help to explain it in detail.
    2.Currently, there is a TMS320VC5509A board that can work normally. The XF pin of DSP can output the waveform of high level and occasionally low level.The CLKOUT pin of DSP can also output 138M clock with amplitude within 1V, please help to explain in detail
    3.Existing a can not work normally TMS320VC5509A board (TRST and RESET pin together, and have a pull-up resistors, EMU0 / EMU1 also connect pull-up resistor), DSP CLKOUT pin can also output amplitude within 1 v 138 m clock, XF pin above can also be output waveform, but LED lights flashing properly (normal work of the board the LED to normal shine), DSP is into test mode or what?Please help to explain in detail.