CCS/TMS320C5517: Timer interrupt events do not occur suddenly.

yongwho kim

Prodigy 60 points

Part Number: TMS320C5517

Tool/software: Code Composer Studio

Dear Mr/Miss

I set the timer interrupt to occur every 1 mS.

It works well at first.

However, when periodically communicating with other peripherals(McSPI, SPI,..), no timer interrupt occurs at any moment.

Then, I write 1 to TIAFR by debugger, timer interrupt occur again.

Then, the interrupt will not occur again soon.

The interrupt function is simple.

interrupt void gpt0Isr(void)
{
     nTimer0CountU++;

    /* Clear Timer Interrupt Aggregation Flag Register (TIAFR) */
    CSL_SYSCTRL_REGS->TIAFR = 0x01;
}

It seems to be OK if It does not communicate peripheral devices.

Why is this happening?

over 5 years ago

0 Cvetolin Shulev-XID over 5 years ago

TI__Guru 65405 points

Hi Yongwho Kim,

The c55x team is notified. They will post their feedback directly here.

BR
Tsvetolin Shulev

0 Lalindra Jayatilleke over 5 years ago

TI__Mastermind 30365 points

yongwho,

Are you allowing DSP BIOS to handle your interrupts?
e2e.ti.com/.../635008

Lali

0 yongwho kim over 5 years ago in reply to Lalindra Jayatilleke

Prodigy 60 points

Hi Lali,

I am using timer interrupts and external interrupts together.

However, there is a phenomenon that the timer interrupt stops in the middle.

External interrupts are as follows.

interrupt void ExtInt0_isr()
{
CSL_FINS(CSL_CPU_REGS->IFR0, CPU_IFR0_INT0, CSL_CPU_IFR0_INT0_ENABLED);

CSL_FINSR (hGpio->baseAddr->IODATAOUT2, CSL_GPIO_PIN0, CSL_GPIO_PIN0, 0);

bufIndex++;

}

Timer interrupts are as follows.

interrupt void gpt0Isr(void)
{
nTimer0CountU++;

/* Clear Timer Interrupt Aggregation Flag Register (TIAFR) */
CSL_SYSCTRL_REGS->TIAFR = 0x01;
}

If a timer interrupt occurs during external interrupt processing, does the timer interrupt be ignored?

Will timer interrupts that occur during external interrupt processing be processed later?

0 yongwho kim over 5 years ago in reply to yongwho kim

Prodigy 60 points

Hi Dear,

I added the following command in ExtInt0_isr with IRQ_disable(), IRQ_enable().

interrupt void ExtInt0_isr()
{

IRQ_disable(TINT_EVENT);

CSL_FINS(CSL_CPU_REGS->IFR0, CPU_IFR0_INT0, CSL_CPU_IFR0_INT0_ENABLED);
CSL_FINSR (hGpio->baseAddr->IODATAOUT2, CSL_GPIO_PIN0, CSL_GPIO_PIN0, 0);
bufIndex++;

IRQ_enable(TINT_EVENT);

}

However, the timer interrupt also disappears in the middle.
When I do not use external interrupts, this does not happen.

I do not know how to solve it.

0 Lalindra Jayatilleke over 5 years ago in reply to yongwho kim

TI__Mastermind 30365 points

yongwho,

"If a timer interrupt occurs during external interrupt processing, does the timer interrupt be ignored?

Will timer interrupts that occur during external interrupt processing be processed later?"

Please see pg of 802 of http://www.ti.com/lit/ug/spruh16b/spruh16b.pdf for details on timer interrupts and their behavior.

Lali

0 yongwho kim over 5 years ago in reply to Lalindra Jayatilleke

Prodigy 60 points

Hi Lali.

Timer interrupts do not occur at any moment when external interrupt and timer interrupt are used at the same time.

Then, When I write 1 to TIAFR by debugger, timer interrupt occur again.

I do not know what's wrong.

ywkim

0 Lalindra Jayatilleke over 5 years ago in reply to yongwho kim

TI__Mastermind 30365 points

ywkim,

You will need to check your external interrupt routine as the routine itself might be masking the interrupt from your timer.
When both the interrupts occur simultaneously, they are queued and are serviced on priority. The external interrupt will have higher priority.

Lali

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CCS/TMS320C5517: Timer interrupt events do not occur suddenly.