• State TI Thinks Resolved
  • Locked Locked
  • Replies 10 replies
  • Answers 3 answers
  • Subscribers 102 subscribers
  • Views 759 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Compiler/TMS320C5505: HWAFFT in tms320c5505

Kanchan
Expert 1445 points
Part Number: TMS320C5505
Other Parts Discussed in Thread: ADS1278, SPRC100

Tool/software: TI C/C++ Compiler

Dear sir/mam,

i am using hwafft library to calculate 1024 point fft.

Till now i have calculated fft for 10bit adc, 12 bit adc nad 16 bit adc..got very good results but for more accuracy.. i move forward for 24 bit adc (ads1278).

input provided 1.3v ref vtg=2.5v

sampling freq=50000.

but not getting the result this time.

i gone through  SPRABB6B document...i got the point is real part is higher 16bit and imaginary are lower 16 bit.

but what if i get the real part is 24 bit? i will never show the correct result..just cross check i mask 24bit data to 16 bit data then appilied the fft and check the result..and got the correct result..

so does this mean that i CAN NOT apply more than 16bit of data to the FFT?

what else i can do

waiting for reply.

  • 0
    TI__Guru 65405 points
    Hi Kanchan,

    You can apply up to 32-bit data to FFT. The HWAFFT implementation of the 32-bit FFT uses two double stages and one single stage of computation. How to do this is described in the links below:
    e2e.ti.com/.../614860
    e2e.ti.com/.../1538041

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    TI__Mastermind 29250 points

    Hi Kanchan,

    The HWAFFT can perform computations on 16-bit fixed-point Real and 16-bit Imaginary parts - 8-pt FFT to 1024-pt FFT.

    The DSPLIB (SPRC100) includes a 32-bit fixed-point FFT routine cfft32 that also supports 8-pt to 1024-pt FFTs. 

    Try using the DSPLIB CFFT32 routine with that 24-bit data. The HWAFFT can only input the 16 most significant bits.

    You may be able to get creative and leverage the 32-bit CFFT32 in combination with the 16-bit HWAFFT, but its going to involve some truncation from 32-bit to 16-bit somewhere. Maybe the 1024-pt FFT can be broken down into smaller FFTs that run with 32-bit precision, then the final stage(s) can revert to 16-bit (but the scaling would not throw away as many LSBs of data). Such software would have to be written.

    Useful list of FFT links: http://www.fftw.org/links.html

    Hope this helps,
    Mark

  • 0 in reply to Mark Mckeown
    Expert 1445 points
    Dear Mark,
    Thank you so much for very useful suggestion..
    As per your suggestion i have started with cfft32 dsplib program..but i dont understand how to interpret its result?
    i mean if i have the output of 1024 array size how do i extract its real and imaginary part?
    real and imaginary part are very much important to me to calculate the phase difference...
    please explain me..i have gone through the "TMS320C55x DSP Library
    Programmer’s Reference" but i didnt get its result interpretation..
    one more thing
    To calculate the phase diff i need to capture two signal on zero crossing(rising interrupt) which based on algebraic model
    where as cfft32 is mnemonic model..so how to select both the algebraic+mnemonic in ccsv7.4??
    when i go through build properties ->runtime model option->slect assembley language option-> mnemonic
    i get the error on interrupt side as algebraic instruction bit set#01..like that..
    when i changed to mnemonic to algebraic i get the errors on cfft32 side i.e. parse error.
    i set the processor option as huge and size 32.
  • 0 in reply to Kanchan
    Expert 1445 points

    waiting for your reply

  • 0 in reply to Kanchan
    Expert 1445 points

    please Reply

  • 0 in reply to Kanchan
    TI__Mastermind 29250 points

    Hi Kanchan,

    The DSPLIB cfft32 function takes real and imaginary data in the fromat x[2*nx] where x is an array of 32-bit, Q31 fixed point numbers (LDATA) in normal-order. See excerpt from http://ti.com/lit/pdf/spru422 below.

    I'm trying to view the data in the graph window of CCS, but its not liking the Q31 number. Let me keep trying so I can confirm the real and imaginary extraction.

    Have you run through the example at in the DSPLIB? sprc100.zip\dsplib_2.40.00\EXAMPLES\cfft32\ (download at http://www.ti.com/tool/sprc100)

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    Expert 1445 points

    Ok Mark..

    yes i have run through dsplib examples from sprc100 zip file.

  • 0 in reply to Kanchan
    TI__Mastermind 29250 points

    Hi Kanchan,

    I've confirmed the DSPLIB CFFT32 takes in data in the Real, Imaginary, Real, Imaginary order. Each Real and Imaginary part is signed 32-bit fixed point S32Q31 - decimal point between bit 32 and bit 31 for a range of -1 to 0.99999...

    To graph the data, I had to truncate the 32-bit fixed point to a 16-bit fixed point because the CCS graph tool cannot interpret Q31 for some reason.

    Attaching the modified cfft32_t.c and 55xdsp_5515.lib (rebuilt for cpu:3.3 - C5505/15/35/45/17 - using small mem model following steps on this E2E post https://e2e.ti.com/support/processors/f/791/p/86024/297465)

    /cfs-file/__key/communityserver-discussions-components-files/791/cfft32_5F00_t.c

    /cfs-file/__key/communityserver-discussions-components-files/791/55xdsp_5F00_5515.lib

    I used this matlab code to create a pure sinusoid tone and get the Q31 fixed point number to test the cfft32 with and then graph the result.

    Nsig = 16;
    fs = 16000;
    sig = zeros(1,Nsig);
    n = 0:(Nsig-1); % discrete-time grid 
    %Add a pure sinusoidal tone
    fk = 4100;
    sig = .5 * sin(2*pi*n*fk/fs); %sinusoid

    sig_fixed = fi(sig,1,32,31);
    sig_fixed_hex = sig_fixed.hex;

    Graphing the truncated input looks like this

    Graphing the truncated cfft32 result looks like this

    Heads up - there is a new hwafft training being released shortly... I will be sure to send you a link to it when its available. Would like your feedback.

    Regards,
    Mark

  • 0 in reply to Mark Mckeown
    Expert 1445 points

    Dear Mark,

    Thank you ..!Thank you ..!Thank you ..!Thank you ..!Thank you ..!

    finally i getting the results as expected..thank you so much..

    i extracted the real and imaginary part as the order u suggested..and the done the analysis..

    yess...please let me know about new  HWAFFT traning.

  • 0 in reply to Kanchan
    TI__Mastermind 29250 points
    Hi Kanchan,

    Thats great!

    You can download the HWAFFT project files already from this link.
    software-dl-stage.itg.ti.com/.../c55x_hwafft_csl_example.zip

    The training will walk you though executing this example from RAM and also calling it from ROM. An additional training dives into the theory of FFTs and discusses the hardware accelerated FFT implementation on the C55xx DSPs.

    Hope to have it online soon.

    Regards,
    Mark