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aic3204 loop-linein problem

      Hi all,

      I am trying to use audio loopback for  usbstk5505. For this, I downloaded test projects at the site http://support.spectrumdigital.com/boards/usbstk5505/revb/.  When I run the aic3204 project, I can hear 1kHz sine wave but I cannot hear any voice(only noise) at the second part. It may be due to my codec settings or stereo in line. I put the test.c which includes codec settings. Where did i made mistake?

   Thanks...

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

/*

* Copyright 2009 by Spectrum Digital Incorporated.

* All rights reserved. Property of Spectrum Digital Incorporated.

*/

 

/*

* AIC3204 Tone

*/

#include

 

 

#include

 

 

extern

 

 

#define

 

 

#define

 

 

#define

 

 

#define

 

 

/* ------------------------------------------------------------------------ *

* *

* AIC3204 Tone *

* Output a 1 kHz tone through the HEADPHONE jack *

* *

* ------------------------------------------------------------------------ */

Int16 aic3204_loop_linein( )

{

Int16 i, j;

Int16 sample, data1, data2, data3, data4;

 

 

 

/* Configure Serial Bus */

SYS_EXBUSSEL |= 0x0100;

// Configure Serial bus 0 for I2S0

 

 

 

 

/* Configure AIC3204 */

 

AIC3204_rset( 0, 0 );

// Select page 1

AIC3204_rset( 1, 1 );

// Reset codec

AIC3204_rset( 0, 1 );

// Point to page 1

AIC3204_rset( 1, 8 );

// Disable crude AVDD generation from DVDD

AIC3204_rset( 2, 1 );

// Enable Analog Blocks, use LDO power

AIC3204_rset( 0, 0 );

 

/* PLL and Clocks config and Power Up */

AIC3204_rset( 27, 0x1d );

// BCLK and WCLK is set as o/p to AIC3204(Master)

AIC3204_rset( 28, 0x00 );

// Data ofset = 0

AIC3204_rset( 4, 3 );

// PLL setting: PLLCLK <- MCLK, CODEC_CLKIN <-PLL CLK

AIC3204_rset( 6, 8 );

// PLL setting: J=8

AIC3204_rset( 7, 15 );

// PLL setting: HI_BYTE(D)

AIC3204_rset( 8, 0xdc );

// PLL setting: LO_BYTE(D)

AIC3204_rset( 30, 0x88 );

// For 32 bit clocks per frame in Master mode ONLY

 

 

// BCLK=DAC_CLK/N =(12288000/8) = 1.536MHz = 32*fs

 

AIC3204_rset( 5, 0x91 );

//PLL setting: Power up PLL, P=1 and R=1

AIC3204_rset( 13, 0 );

// Hi_Byte(DOSR) for DOSR = 128 decimal or 0x0080 DAC oversamppling

AIC3204_rset( 14, 0x80 );

// Lo_Byte(DOSR) for DOSR = 128 decimal or 0x0080

AIC3204_rset( 20, 0x80 );

// AOSR for AOSR = 128 decimal or 0x0080 for decimation filters 1 to 6

AIC3204_rset( 11, 0x88 );

// Power up NDAC and set NDAC value to 8

AIC3204_rset( 12, 0x82 );

// Power up MDAC and set MDAC value to 2

AIC3204_rset( 18, 0x88 );

// Power up NADC and set NADC value to 8

AIC3204_rset( 19, 0x82 );

// Power up MADC and set MADC value to 2

 

 

/* DAC ROUTING and Power Up */

AIC3204_rset( 0, 1 );

// Select page 1

AIC3204_rset( 0x0c, 8 );

// LDAC AFIR routed to HPL

AIC3204_rset( 0x0d, 8 );

// RDAC AFIR routed to HPR

AIC3204_rset( 0, 0 );

// Select page 0

AIC3204_rset( 64, 2 );

// Left vol=right vol

AIC3204_rset( 65, 0 );

// Left DAC gain to 0dB VOL; Right tracks Left

AIC3204_rset( 63, 0xd4 );

// Power up left,right data paths and set channel

AIC3204_rset( 0, 1 );

// Select page 1

AIC3204_rset( 0x10, 10 );

// Unmute HPL , 10dB gain

AIC3204_rset( 0x11, 10 );

// Unmute HPR , 10dB gain

AIC3204_rset( 9, 0x30 );

// Power up HPL,HPR

AIC3204_rset( 0, 0 );

// Select page 0

 

 

 

USBSTK5505_wait( 100 );

// wait

 

 

/* ADC ROUTING and Power Up */

AIC3204_rset( 0, 1 );

// Select page 1

AIC3204_rset( 0x34, 0x30 );

// STEREO 1 Jack

 

 

// IN2_L to LADC_P through 40 kohm

AIC3204_rset( 0x37, 0x30 );

// IN2_R to RADC_P through 40 kohmm

AIC3204_rset( 0x36, 3 );

// CM_1 (common mode) to LADC_M through 40 kohm

AIC3204_rset( 0x39, 0xc0 );

// CM_1 (common mode) to RADC_M through 40 kohm

AIC3204_rset( 0x3b, 0 );

// MIC_PGA_L unmute

AIC3204_rset( 0x3c, 0 );

// MIC_PGA_R unmute

AIC3204_rset( 0, 0 );

// Select page 0

AIC3204_rset( 0x51, 0xc0 );

// Powerup Left and Right ADC

AIC3204_rset( 0x52, 0 );

// Unmute Left and Right ADC

 

AIC3204_rset( 0, 0 );

USBSTK5505_wait( 100 );

// Wait

 

 

/* I2S settings */

I2S0_SRGR = 0x0;

I2S0_CR = 0x8010;

// 16-bit word, slave, enable I2C

I2S0_ICMR = 0x3f;

// Enable interrupts

 

 

/* Play Tone */

 

 

 

for

( i = 0 ; i < 400 ; i++ )

{

 

 

for

( j = 0 ; j < 1000 ; j++ )

{

 

 

for

( sample = 0 ; sample < 48 ; sample++ )

{

 

 

/* Read Digital audio input */

data3 = I2S0_W0_MSW_R;

data1 = I2S0_W0_LSW_R;

 

 

while((RcvR & I2S0_IR) == RcvR)

data4 = I2S0_W1_MSW_R;

data2 = I2S0_W1_LSW_R;

 

 

 

/* Write Digital audio input */

I2S0_W0_MSW_W = data3;

I2S0_W0_LSW_W = 0;

 

 

while((XmitR & I2S0_IR) == XmitR)

I2S0_W1_MSW_W = data4;

I2S0_W1_LSW_W = 0;

 

}

}

}

 

 

/* Disble I2S */

I2S0_CR = 0x00;

AIC3204_rset( 1, 1 );

// Reset codec

 

 

return 0;
RcvL 0x04
RcvR 0x08
XmitR 0x20
XmitL 0x10
Int16 AIC3204_rset( Uint16 regnum, Uint16 regval);
"usbstk5505.h"
"stdio.h"

  • Hi selami,

     This is not software but hardware problem. There is difference between input 'Line-in' and input from mic when signal is biased. Unfortunately (or rather fortunately) ezdsp 5505 rev. B is designed to handle just 'Line-in'. In that case good solution is to connect PC line-in port to ezdsp via standard audio cable. It's quite convenient, because you can use any signal that way, not just voice.

    For more info check my old topic:

    http://e2e.ti.com/support/dsp/tms320c5000_power-efficient_dsps/f/110/t/64519.aspx     

  • Michal is correct.

    The MIC BIAS is required to receive a signal from an electret microphone (typical PC Mic). Although the pin is available on the AIC3204 Stereo Codec, it has not been connected to the Line-In Jack on current eZdsp versions.

    Starting with the next C5505 eZdsp revision, this pin will be connected to the Line-In/ Mic-In jack. As we revision the other eZdsp devices, they will also include the MIC BIAS, enabling electret microphone use.

    For now, you can use a line-in source like an MP3 player, computer, etc. But if you require a microphone for your application, a dynamic microphone will work without MIC BIAS provided. Or an electret microphone with externally provided MIC BIAS.

    Best Regards,
    Mark

  • Having the opportunity, I would like to ask - does same problem occurs in ezdsp 5515? I plan to buy that board, but if there are also some plans for revision I would rather wait.

  • Hi Michal,

    Yes, the C5515 eZdsp also does not have the MIC BIAS wired to the STEREO IN audio jack.

    However, the C5515 EVM has the MIC BIAS wired and also has two built in microphones.

    The first eZdsp to offer MIC BIAS will be the new rev of the C5505 eZdsp, which should be available for purchase in the coming days.

    I will follow up soon with ordering instructions to make sure you get the new rev.

    Best Regards,
    Mark

  • Thanks Mark, for all these informations.

  • Hi,

    I just got a C5505 eZdsp, Rev C board. After seeing this discussion I was just wondering if the Mic support has been added.
    I am facing issues when I connect a Mic to the board (either the Mic is dead or the board still doesn't have the feature).

    Can someone please help me get information about this ?

    Thank You.