Problem when I using SPI and UART simultaneously on the TMS320VC5505

Yes. all the peripherals are designed to work concurrently and is routed to the I/O pins via the External Bus Selection Register. It is located in 0x1C00. Double check your program. Refer to the Device Spec or System User's Guide for details. Are you using CSL version 2.10? Which examples are you combining? The CSL examples are written as individual tests. Modification is required when merging together.

Regards.

Steve Tsang

Yes. all the peripherals are designed to work concurrently and is routed to the I/O pins via the External Bus Selection Register. It is located in 0x1C00. Double check your program. Refer to the Device Spec or System User's Guide for details. Are you using CSL version 2.10? Which examples are you combining? The CSL examples are written as individual tests. Modification is required when merging together.

Regards.

Hi,

I am also experiencing a similar problem. You suggest to go to CSL 2.10 ? Currently I am using CSL 2.01 with a VC5505 DSP. Is there a potential problem with the older CSL 2.01 ?? I have downloaded the CSL 2.10 but it does not have the cslVC5505L.lib which I normally use to link with my project. Where are these library files for 2.10, or do I need to build the CSL 2.10 libraries myself ?

Regards,

M

Thanks for your answer !

Yes I know the register EBSR  located in 0x1c00. I have fixed it to  0x593f wich is :

• PPMODE=mode 5:(8-bit LCD Controller, SPI, and UART). 8-bits of pixel data of the LCD Controller module, 4 signals of the SPI module, and 4 signals of the UART module are routed to the 21 external signals of the parallel port.
• SP1MODE:Mode 2 ( GP[11:6]). 6 GPIO signals (GP[11:6]) are routed to the 6 external signals of the serial port 1.
• SP0MODE 01 = Mode 1 (I2S0 and GP[5:0]). 4 signals of the I2S0 module and 2 GP[5:4] signals are routed to the 6 external signals of the serial port 0.

Else I don't use version 2.10 but 2.01. Do you think that I need to use the latest?

 I don't know wich examples has been used to write this code because  I have recover this code from a old projet. But this my initialization  for the UART  and for the SPIBUS
are :

/****************************************************************************************************************************************

 

CSL_UartSetup mySetup =
{
/* Input clock freq in Hz */
    100000000,
/* baud rate */
   9600,
/* word length of 8 */
    CSL_UART_WORD8,
/* To generate 1 stop bit */
    0,
/* Disable the parity */
    CSL_UART_DISABLE_PARITY,
/*disable fifo */
//    CSL_UART_FIFO_DISABLE,
/*enable trigger 14 fifo */
 CSL_UART_FIFO_DMA1_DISABLE_TRIG14,
/* Loop Back enable */
  CSL_UART_NO_LOOPBACK,
/**No auto flow control*/
 CSL_UART_NO_AFE ,
/** No RTS */
 CSL_UART_NO_RTS ,
};

Uint16 uart_IntcSample(void)
{

 CSL_UartIsrAddr isrAddr;
 CSL_Status    status;
 
 UART_init(&uartObj,CSL_UART_INST_0,UART_INTERRUPT);
   
    // Handle created
    hUart = (CSL_UartHandle)(&uartObj);

    // Configure UART registers using setup structure   
    status = UART_setup(hUart,&mySetup);

 IsrAddr.rbiAddr  = uart_rxIsr;  

 isrAddr.tbeiAddr =  uart_txIsr;   

isrAddr.ctoi     =  uart_ctoIsr; 

 isrAddr.lsiAddr =   uart_lsiIsr;.
  UART_setCallback(hUart,&isrAddr);
 status = UART_eventEnable(hUart,CSL_UART_XMITOR_REG_EMPTY_INTERRUPT);
 status = UART_eventEnable(hUart,CSL_UART_RECVOR_REG_DATA_INTERRUPT);
 return status;

}

 

 

void TI_CC_SPISetup(void)
{
 SPI_Config      spiHwConfig;
 Uint16          value;
 CSL_SpiHandle   hSpi;
    
   SPI_init();

****************************************************************************************************************************************

/****************************************************************************************************************************************

 

 hSpi = SPI_open(SPI_CS_NUM_1, SPI_POLLING_MODE);
   
    // Set the SPI hardware configuration.
 spiHwConfig.spiClkDiv = 13;     // DIV=13+1=14, donc 100MHz/14=SPI_CLK=7,14MHz @ 100MHz.
 spiHwConfig.wLen  = SPI_WORD_LENGTH_8;
 spiHwConfig.frLen  = 1;
 spiHwConfig.wcEnable = SPI_WORD_IRQ_ENABLE;
 spiHwConfig.fcEnable = SPI_FRAME_IRQ_DISABLE;
 spiHwConfig.csNum  = SPI_CS_NUM_1;
 spiHwConfig.dataDelay = SPI_DATA_DLY_0;
 spiHwConfig.csPol  = SPI_CSP_ACTIVE_LOW;
 spiHwConfig.clkPol  = SPI_CLKP_LOW_AT_IDLE;
 spiHwConfig.clkPh  = SPI_CLK_PH_FALL_EDGE;
 

    SPI_config(hSpi, &spiHwConfig);

 /****************************************************************************/
 /** This configuration for the EEPROM*/
  do { /* Check for bsy status */
            value=CSL_FEXT(CSL_SPI_REGS->SPISTAT1,SPI_SPISTAT1_BSY);
        }while(value & 0x01==1);
}

****************************************************************************************************************************************

/****************************************************************************************************************************************

Thanks  for you help

/****************************************************************************************************************************************

Hi,

I have changed the configuration of the Uart directly in my CSL_UartHandle structure. I have done this after I have initialize my SPI BUS and now the two can work simultaneously

I have changed this :

 hUart->uartRegs->DLH=2;                                                // Fixe  the baud rates for the UART
hUart->uartRegs->DLL=139;

 hUart->uartRegs->PWREMU_MGMT=24579;               // Power and Emulation Management Register : Transmitter/ Receiver enabled;  Free-running mode is enabled
 hUart->uartRegs->IER=3;                                     
 hUart->uartRegs->FCR=194;                                           // Fixe the  Line Control register
 hUart->uartRegs->LCR=3;                                                // Fixe the fifo control register 

Thanks for your help

Hi CHAIX, well done for this solution. I had the same problem, and followed your method. It works.

I would appreciate if anyone from TI can shed some light on why these registers are overwritten when the SPI  is being configured.

Regards,

 

Simon

Gents,

I too am running into anomolies while using the UART + SPI. Here are a couple of interesting observations:

1) The CSL UART_init() function resets the entire peripheral group(4), not just he UART peripheral. This will cause the SPI peripheral to be reset which will erase any configuration of the SPI done before configuring the UART.

CSL_FINST(uartObj->sysAddr->PRCR, SYS_PRCR_PG4_RST,RST);

2) Also, the value of SYS_PSRCR_COUNT is not set before the above reset occurs. In my case the value of SYS_PSRCR_COUNT = 0x02 when the reset is issued, which appears to be too short according to sprufx5d.

I have tried modifying the csl_uart.c with a value of 0x20 (which is what is used in csl_spi.c), but it has not fixed the problems I am seeing.

WOULD SOMEONE FROM TI PLEASE GIVE US SOME GUIDANCE ON THIS ISSUE? Is there a problem with the CSL when using both the SPI + UART simultaneously?