C6000 Multicore DSP

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C6000 Multicore DSP

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  • Forum Post: IQmath wrong output

    SNBANIK
    I have observed this strange behaviour. I am using this call: xsqrPysqrQ15 = _FtoIQ15(x*x+y*y); where x & y are float and xsqrPysqrQ15 is _iq15 quantity. if y = 233.1827 then for x < -105.6 I get the output of the above call as 0 (zero). if x = -105.6 or -105.5 or -105.4 or ...
    on Sep 29, 2010

  • Forum Post: Re: Problem regarding fft32x32.asm program

    brajesh kumar19415
    Hi I am not using C64x+ DSPLIB code. I got the code from the following link http://focus.ti.com/dsp/docs/dspplatformscontento.tsp?sectionId=2&familyId=1635&tabId=2432 This code contain SPLOOP ,SPKERNEL and it is different from the DSP_fft32x32 .The code is working fine with 64 or more points...
    on Oct 26, 2010

  • Forum Post: IQmath atan2 pipeline performance

    SNBANIK
    I am not getting the documented pipelined performance for atan2 (or other functions like sqrt). (SPRUGG9) This is what I tried -- for (i=0; col <SizeX; i++) { phiRadQ15[i] = _IQ15atan2(xRFxd[i],yRFxd[i]); } I get 118 cycles per point which is the non pipelined performace. (processor used...
    on Sep 29, 2010

  • Forum Post: Initiating the EVM6472

    Dr. Yehuda Singer
    Dear Sir/Mrs. I am using the EVM6472 board. I started reading. I need only the memory of the EVM. In addition, I want to understand completely the rational beyond the demo OOBDemo_Bios6 which is supplied with the evaluation board. More specifically, I want to understand the mechanism in the XDC...
    on Dec 15, 2010

  • Forum Post: IPCGR atomicity

    khaled saab
    Hi, We are using the IPCGR register to mange inter cores communications on a C6472. At low data rate, the code works fine and we are able to synchronize the cores and send messages between them: The source core(s) set the IPCGR register of the destination core, and wait for the destination core...
    on May 18, 2011

  • Forum Post: SL2RAM uDMA3

    khaled saab
    Hi, I'm using a C6472 DSP chip. in order to move data between the different cores, we are using a section of the SL2RAM as shared memory. The source core put data into that section and the destination core reads it back. the IPC registers (IPCGR and IPCAR) are used to send semaphores between...
    on Apr 26, 2011

  • Forum Post: help on tms320C6455 libraries..

    anish menon
    hi I wanted to know if there is any resource which can help me code in code composer studio v4 in C... I am not able to find the libraries for the various components of the c6455 board. I am using an emulator. Thank you Anish Menon
    on Jun 7, 2011

  • Forum Post: Enforcing pointer alignment

    Manu Bansal
    Hi, I'm programming the VCP2 on a C6474 multi-core platform and my hunch is that I am running into input or output buffer misalignment problems. My code runs with some buffer length (and advance stride) settings, but fails with others. EDMA3 transfers need to be double(?) word-aligned. In general...
    on Jul 12, 2011

  • Forum Post: Memmory map understanding

    NARESH PATEL
    Hi, Here i show section of map file L2 is memory of my EVM. .map file is shown below, SECTIONS { .text > L2 .stack > L2 .bss > L2 .cinit > L2 .cio > L2 .const > L2 .data > L2 .switch > L2 .sysmem > L2 .far > L2 } There are different section in .map file. I know...
    on Jul 13, 2011

  • Forum Post: How to implement AIF on EVM6474?

    XL Terrence
    hi, I am new to EVM6474. How can I implement AIF(CPRI or OBSAI) on the EVM6474 , so that DSP_1 on the board can send data to another DSP(DSP_2) or vice-versa. Is there any example to implement this inter-dsp communication? Thanks
    on Jul 13, 2011

  • Forum Post: Re: Mixed Radix FFT

    Anadi
    Hi Travis, Any updates on this? Br Anadi
    on Jul 19, 2011

  • Forum Post: Re: Mixed Radix FFT

    Anadi
    Hi Travis, Thanks for the updates. I was looking for a solution suitable for the 64x+ core. Migration to the c66x core is planned for my design, but not immediately. I guess with the keystone devices such as 6670, this may be required only for some SW special cases, since the FFTC HW accelerator...
    on Jul 20, 2011

  • Forum Post: JPEG2000 & DSP processors

    Faraz Firoozabadi
    Does TI support JPEG2000 on its DSP Processors? Where can i get more info regarding this?
    on Jun 29, 2011

  • Forum Post: Assembly code for breakpoint (TMS320C64x+)

    Florian Kohl
    Does anyone know the assembly code to halt the TMS320C64x+ processor? I already searched for it in several reference guides, but i couldn't find it. It would be great if you could help me. Regards, Florian Kohl
    on May 24, 2011

  • Forum Post: cycle count _divi(int, int) on a TMS320C6472

    khaled saab
    Hi, I'm using TMS320C6472,and I'm trying to obtain the cycle count the integer division _divi(int, int). I checked different documents but non discuss the cycle counts. I tried to obtain the cycle count though a benchmark, but the number of cycle obtained seems to be too much (76cycles...
    on Mar 5, 2012

  • Forum Post: Example to use IMGLIB

    abdellah abdo
    Hi every body, I'm new in image processing on DSP. I'm working with evmc6474 for my project ANPR (Automatic Number Plate Recognition) and I find IMGLIB as librery of image processing. I need some example how to use the functions like IMG_boundary for an image stored in memory. Sorry for my...
    on Apr 11, 2012

  • Forum Post: Problem with MCSDK Client example for C6472 when running in multicore

    Arun Kumar Shukla
    Hi, I am able to run the client example on core 0. Not i want to run the same example in all cores at same time. means each core can configure its own EMAC channel. I have adjusted the progem sections in different memory. My Latest configuration for memory in CFG file is: Program.sectMap["...
    on Sep 27, 2011

  • Forum Post: C6474 Megamodule Error Detection Correct Registers definitions

    BlackYew
    hello, in SPRZ283c, Advisory 2.1.8 Error Detection and Correction Incorrectly Reporting Error and SPRS552H Table 5-13. Megamodule Error Detection Correct Registers , we can see there are registers about Error Detection, but i cant find the definitions of these registers. could anyone tell me...
    on May 24, 2012

  • Forum Post: DNUM is not available at compile time

    khaled saab
    Hi, I want to build a core dependent code using target compilation. Tried to use DNUM bu no success (see example code below). It seems that DNUM can only be used during run time! As such, what can I use to replace DNUM? thanks. #if (DNUM == 0) //core 0 code #endif #if(DNUM == 1) //core...
    on Jul 12, 2012

  • Forum Post: L1D and LL2 cache coherency when using EDMA3

    SNBANIK
    Processor Used: c6472. We have a situation where we suspect we could be hitting a L1D to L2 cache coherency issue but not sure. We use all of L1D as cache. We have a (temporary) processing buffer (significant size) in LL2. The final output buffer is in DDR2. We use EDMA3 to transfer the processed...
    on Apr 2, 2013

  • Forum Post: RE: Theoretical clock cycles vs. measured time

    Iam Spark
    Hi, We are facing similar problem. But, how can I enable L1D cache ? Can you explain me a little on how to do it? Thanks in advance.
    on Apr 29, 2013

  • Forum Post: RE: I2C read using CSL

    khaled saab
    I need a simple I2C receive function. Can anyone reply? thanks.
    on Apr 29, 2013

  • Forum Post: I2C read using CSL

    khaled saab
    Hi,I'm using C6472, CCS3.3, and I would like to write a simple I2C read routine. I tried the example code that came with the CSL library and it worked fine (write and read back in loopback mode). I need a simple read. I tried to modify the example code with no success. I tried other examples...
    on Apr 5, 2013

  • Forum Post: Software Tool Kit for Medical Diagnostic Ultrasound

    Wissam Marrouche
    I have the TI Embedded Processor Software Tool Kit for Medical Diagnostic Ultrasound CD version 2. I want to join the following ultrasound packages: rxbf, rfdemod, bpu, dpu and scu into one functional block that takes raw data as input and produce a raster image. I am finding difficulties gluing all...
    on Feb 18, 2013

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