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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » C6000 Multicore DSP » Keystone Multicore Forum (C66, 66A, AM5)
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    The Multicore Mix blog

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      Geeks UNITE for Geek Pride Day

      Posted 2 days ago
      by Lauren Reed1
      Happy Geek Pride Day from the Processors team! We wanted to celebrate this fun holiday with a unique post on Multicore Mix. We...
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      OpenMP - All aboard!

      Posted 4 days ago
      by Debbie Greenstreet
      With so many end products today relying on multicore DSPs for optimized solutions, I find it very encouraging to see that our...

    Keystone Multicore Forum (C66, 66A, AM5)

    C6000 Multicore DSP

    Welcome to the C6000 Multicore DSP Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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    Keystone Multicore Forum (C66, 66A, AM5)
    All Recent | Unverified
    Topic Date Replies Views
    Jason Gao Jason Gao

    C6678 SRIO port error

    Latest post
    by Jason Gao
    May 23 2013 22:01 PM
    • 0
    • 15
    Fan Zhang1 Fan Zhang1

    Look for an example for c6678 NDK socket programming

    Latest post
    by Fan Zhang1
    May 24 2013 14:50 PM
    • 0
    • 16
    Lars Petter Eliassen Lars Petter Eliassen

    VCNTL interface

    Latest post
    by Bill Taboada
    May 24 2013 14:22 PM
    • 1
    • 17
    ilay nissim ilay nissim

    c6678 spi boot to rapid io boot

    Latest post
    by ilay nissim
    May 20 2013 23:54 PM
    • 0
    • 22
    Sudarshan R Sudarshan R

    Timer cycles gets divided by 8 without main PLL Init

    Latest post
    by Sudarshan R
    May 23 2013 07:24 AM
    • 0
    • 24
    Kaka Huang Kaka Huang

    usage of both SGMII on EVM6678L problem

    Latest post
    by Kaka Huang
    May 23 2013 21:18 PM
    • 0
    • 24
    EASHWAR ARIVAZHAGAN EASHWAR ARIVAZHAGAN

    AM5K2E04 complete datasheet

    Latest post
    by Bill Taboada
    May 24 2013 14:49 PM
    • 1
    • 26
    alpha alpha

    C6678 : allowable load

    Latest post
    by alpha
    May 22 2013 02:34 AM
    • 0
    • 26
    RAHMOUNE ILYASS RAHMOUNE ILYASS

    Ethernet port with TMDSEVM6678LXE board

    Latest post
    by Bill Taboada
    May 24 2013 14:15 PM
    • 1
    • 28
    Simon Wheeler Simon Wheeler

    PA Multicore Example - Why is there a delay after pushing packet to...

    Latest post
    by lding
    May 24 2013 10:24 AM
    • 1
    • 28
    BrandonAzbell BrandonAzbell

    MCSDK 3_00_00_10 build target for dtb

    Latest post
    by BrandonAzbell
    May 25 2013 18:17 PM
    • 1
    • 31
    Stanley Shen Stanley Shen

    TMS320C6657 DDR3 roting question.

    Latest post
    by Bill Taboada
    May 24 2013 14:43 PM
    • 1
    • 31
    Ralph Geraeds Ralph Geraeds

    problem wint Srio_start in SRIO_LoopbackDIOIsrexampleproject on C6657

    Latest post
    by Ralph Geraeds
    May 21 2013 06:46 AM
    • 0
    • 31
    Youngju Lee Youngju Lee

    how to use ddr3 x 2 ranks for 2048MB in C6678?

    Latest post
    by Tom Johnson16214
    May 22 2013 22:50 PM
    • 1
    • 31
    pratik jain pratik jain

    how to enable both the ethernet port using NDK for TMS320C6678

    Latest post
    by pratik jain
    May 22 2013 07:39 AM
    • 0
    • 32
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