Hi there,I have a couple of questions on SRIO Bootloader operation of C6670 DSP.
Q1. How long does it take for the DSP to get ready to accept NWRITEs from the external host after the initial POR sequence has been completed?Is there any means for the external host to know the ready status?
Q2. What is the required condition for each of the four BC bits in BOOTCOMPLETE register to get asserted?I was thinking it's asserted when the boot loader program completes initialization of peripherals and enters polling loop of the magic address.However, as far as I have know, the register always remained 0x00000000 when read from the XDS560V2 emulator.
B.R.Naoki
Hi Naoki,
Please, find my comments inserted below:
[Karthik]: There is no fixed time for DSP to get ready to accept NWRITE boot packets from the external host. The DSP SRIO is ready to receive packets, once you can see PORT OK status on the external host. Hence, the external host can start sending NWRITE boot packets, once it sees SRIO PORT OK.
[Karthik]: The BOOT COMPLETE bit for a particular CorePAC is set, once the ROM boot loader has completed execution and just before branching to the predefined location in memory (start address of the SW which is received as a result of boot loading). This boot complete bit also drives an external BOOTCOMPLETE pin.
Thanks,
Karthik
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Hi Karthik,
Thank you for posting your comments.
I'm glad to tell you that I was able to boot core0 from the external srio host and also see the BC0 bit to become 0b1. I'm going to try the same with other cores.
Quote:> [Karthik]: There is no fixed time for DSP to get ready to accept NWRITE > boot packets from the external host. The DSP SRIO is ready to receive > packets, once you can see PORT OK status on the external host. Hence, > the external host can start sending NWRITE boot packets, once it sees > SRIO PORT OK. > ...> [Karthik]: The BOOT COMPLETE bit for a particular CorePAC is set, once > the ROM boot loader has completed execution and just before branching to > the predefined location in memory (start address of the SW which is > received as a result of boot loading). This boot complete bit also drives > an external BOOTCOMPLETE pin.
OK, understood. I was thinking (misguidedly) the BC bits are asserted just simply powering on the device.As you suggested, polling the SRIO PORT OK bit instead seems the right solution.
Best Regards,Naoki