This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Part Number: TMS320C6678
I modified the PCIe example project to set it up in PHY loopback mode. I followed the steps listed in the user manual and it looks like everything is working but I'm seeing some strange behavior.
After I send the data from RC, I query the fatal, non-fatal, correctable, unsupported request error bits in the DEV_STAT_CTRL register. The unsupported request error bit is always coming back as a 1, along with the non-fatal error bit. But, the destination buffer matches the source buffer and I see "Root complex received data" message in the console.
Any thoughts on why those bits are being set to 1 and yet the loop back mode succeeds?
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Cvetolin Shulev-XID:
In reply to lding:
You are right, I modified the existing project to support PHY loopback mode.
I noticed that those error bits are being set even before the data is being sent. The LTSM value is 11 as expected and I see "Link is up" message on the console.
I made PCIE_OB_LO_ADDR_RC and PCIE_IB_LO_ADDR_RC the same to get this to work. The data I send is correctly echoed back into the appropriate buffer, but I don't know why those error bits are being set.
In reply to VineyK:
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.