Memory Sections and location

Hi,

I need to gaurentee the location of a memory section in DDR3.  However, it seems that my best guess of it just being the order I declare is not the case.  I am wondering what the rules are?  Here is my example to make my question clear.

In my cfg file I have these lines:

Program.sectMap[".windowData"] = new Program.SectionSpec();

Program.sectMap[".windowData"] = "DDR3";

Program.sectMap[".testData"] = new Program.SectionSpec();

Program.sectMap[".testData"] = "DDR3";

In my program I have these lines:

#pragma DATA_SECTION(windows, ".windowData")

UInt8 windows[WINDOW_SIZE][4];

#pragma DATA_SECTION(testing, ".testData")

UInt8 testing[WINDOW_SIZE][4];

When I compile, my map shows that windowData is after testData.  I need window data to be gaurenteed to be at the same location every compile.  Due to the order of my config file, I would have suspected that windowData was at 0x80000000 not testData.

80000000    80000000    00040000   00000000    rw-

  80000000    80000000    00020000   00000000    rw- .testData

  80020000    80020000    00020000   00000000    rw- .windowData

 

I am not too familar with the RTSC configuration etc.  Please advise on how to properly map windowData to 80000000.


Thanks,
brandy 

 

 

 

 

 

 

  • The rules are explained in SPRU186V (Assembly Language Tools User Guide), Chapter 2 (Intro to Object Modules) and Chapter 7 (Linker).

    I think the applicable rule is "biggest first", to reduce memory fragmentation.

    I notice one of the TI examples (for IPC) has this in it, to reserve 0x8000 bytes at 0x0C3F8000 (the top of MSMC):

    SECTIONS
    {
       SharedRegion_0:  { . += 0x8000;} run > 0xc3f8000, type = NOLOAD
    }

    Then you can say something like this:

    Program.sectMap[".windowData"] = "SharedRegion_0";

  • Hi brandy,

    If you want to a section allocated in a fixed address, just modify the statement in your cfg:

    Program.sectMap[".windowData"] = new Program.SectionSpec();

    Program.sectMap[".windowData"] .loadAddress = 0x80000000;

     

    Allen

  • In reply to Allen Lee:

    Hello Allen,

    thanks for the idea.  It didn't seem to change anything though.  windowData is still at 0x80020000.  Bummer - if only it could have been that simple :)

     

    Hello Jonathan,

    Thank you for the document reference and also for your idea, although I am not quite clear how to implement it.  I assume you mean to add the lines to the config file?  The SECTIONS directive seems to be used just in linker files and my project is an RTSC so I think my linker file gets created automagically by the .cfg file.

    You are right about the largest going first - if I make .testData smaller then .windowData will move to 0x80000000.  While understanding the rules is good, I really don't want to get caught later because I forgot to check the memory map after each compile.

     

    Thanks both of you, I am happy to test any more theories if you have them!

    Brandy

  • In reply to BrandyJ:

    Hi Brandy,

    The method works well on my side, so could you please paste your cfg file here?

    Allen

  • In reply to Allen Lee:

    Hi Allen,

     

    Sure.  Aside from the memory section it is the same config file that can be would in the SRIO_DIOLoopbackExample.

    /*

     *  Copyright 2009 by Texas Instruments Incorporated.

     *

     *  All rights reserved. Property of Texas Instruments Incorporated.

     *  Restricted rights to use, duplicate or disclose this code are

     *  granted through contract.

     *

     */

     

    /* THIS FILE WAS GENERATED BY ti.sysbios.genx */

     

    /*

     *  ======== loopbackDioIsr.cfg ========

     *

     */

     

    environment['xdc.cfg.check.fatal'] = 'false';

     

    /* Load and use the various BIOS modules. */

    var Memory  = xdc.useModule('xdc.runtime.Memory');

    var BIOS    = xdc.useModule('ti.sysbios.BIOS');

    var HWI     = xdc.useModule('ti.sysbios.family.c64p.Hwi');

    var CPINTC  = xdc.useModule('ti.sysbios.family.c66.tci66xx.CpIntc');

    var ECM     = xdc.useModule('ti.sysbios.family.c64p.EventCombiner');

    var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');

    var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');

    var SEM     = xdc.useModule('ti.sysbios.knl.Semaphore');

    var Task    = xdc.useModule('ti.sysbios.knl.Task');

    var Idle    = xdc.useModule('ti.sysbios.knl.Idle');

    var Log     = xdc.useModule('xdc.runtime.Log');

    var Diags   = xdc.useModule('xdc.runtime.Diags');

     

    /* Load and use the CSL, CPPI, QMSS and SRIO packages */

    var cslSettings = xdc.useModule ('ti.csl.Settings');

    var Cppi = xdc.loadPackage('ti.drv.cppi');

    var Qmss = xdc.loadPackage('ti.drv.qmss');

    var Srio = xdc.loadPackage('ti.drv.srio');

     

    /* Load and use the System Package */

    var System = xdc.useModule('xdc.runtime.System');

    SysStd  = xdc.useModule('xdc.runtime.SysStd');

    System.SupportProxy = SysStd;

     

    /*

     * Enable Event Groups here and registering of ISR for specific GEM INTC is done

     * using EventCombiner_dispatchPlug() and Hwi_eventMap() APIs

     */

    ECM.eventGroupHwiNum[0] = 7;

    ECM.eventGroupHwiNum[1] = 8;

    ECM.eventGroupHwiNum[2] = 9;

    ECM.eventGroupHwiNum[3] = 10;

     

    /* Load and use the IPC packages */

    var Ipc          = xdc.useModule('ti.sdo.ipc.Ipc');

    var Settings     = xdc.module('ti.sdo.ipc.family.Settings');

    var ListMP       = xdc.useModule('ti.sdo.ipc.ListMP');

    var GateMP       = xdc.useModule('ti.sdo.ipc.GateMP');

    var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');

    var HeapMemMP    = xdc.useModule('ti.sdo.ipc.heaps.HeapMemMP');

    var MultiProc    = xdc.useModule('ti.sdo.utils.MultiProc');

     

    /* Create a default system heap using ti.bios.HeapMem. */

    var heapMemParams1         = new HeapMem.Params;

    heapMemParams1.size        = 32768;

    heapMemParams1.sectionName = "systemHeap";

    Program.global.heap0       = HeapMem.create(heapMemParams1);

     

    /* This is the default memory heap. */

    Memory.defaultHeapInstance = Program.global.heap0;

     

    Program.sectMap["systemHeap"] = Program.platform.stackMemory;

     

    /* Configure the shared memory heap for shared memory allocations required by the

     * CPPI and QMSS Libraries */

    SharedRegion.translate = false;

     

    var memmap = Program.cpu.memoryMap;

     

    Startup = xdc.useModule('xdc.runtime.Startup');

    Startup.firstFxns.$add('&myStartupFxn');

     

    MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2", "CORE3"]);

     

    /* Synchronize all processors (this will be done in Ipc_start) */

    Ipc.procSync = Ipc.ProcSync_ALL;

     

    /* To avoid wasting shared memory for Notify and MessageQ transports */

    for (var i = 0; i < MultiProc.numProcessors; i++) {

        Ipc.setEntryMeta({

            remoteProcId: i,

            setupNotify: false,

            setupMessageQ: false,

        });

    }

     

    /* Create a shared memory */

    SharedRegion.setEntryMeta(0,

        { base: 0x0C010000,

          len: 0x00100000,

          ownerProcId: 0,

          isValid: true,

          name: "sharemem",

        });

     

    Program.sectMap[".srioSharedMem"] = new Program.SectionSpec();

    Program.sectMap[".srioSharedMem"] = "MSMCSRAM";

     

    Program.sectMap[".qmss"] = new Program.SectionSpec();

    Program.sectMap[".qmss"] = "MSMCSRAM";

     

    Program.sectMap[".cppi"] = new Program.SectionSpec();

    Program.sectMap[".cppi"] = "MSMCSRAM";

     

    Program.sectMap[".windowData"] = new Program.SectionSpec();

    Program.sectMap[".windowData"]         =             "DDR3";

    Program.sectMap[".windowData"].loadAddress = 0x80000000;

     

     

    Program.sectMap[".testData"] = new Program.SectionSpec();

    Program.sectMap[".testData"] =             "DDR3";

     

     Here is the memory map after I compile with this file.

    MEMORY CONFIGURATION

     

             name            origin    length      used     unused   attr    fill

    ----------------------  --------  ---------  --------  --------  ----  --------

      L2SRAM                00800000   00080000  0002fffc  00050004  RW X

      MSMCSRAM              0c000000   00400000  001025fc  002fda04  RW X

      DDR3                  80000000   20000000  00300000  1fd00000  RWIX

     

     

    SEGMENT ALLOCATION MAP

     

    run origin  load origin   length   init length attrs members

    ----------  ----------- ---------- ----------- ----- -------

    00800000    00800000    0001bc20   0001bc20    r-x

      00800000    00800000    0001bc20   0001bc20    r-x .text

    0081bc20    0081bc20    00008000   00000000    rw-

      0081bc20    0081bc20    00008000   00000000    rw- systemHeap

    00823c20    00823c20    000053e6   000053e6    r--

      00823c20    00823c20    000053e6   000053e6    r-- .const

    00829010    00829010    00002198   00000000    rw-

      00829010    00829010    00002198   00000000    rw- .far.1

    0082b1b0    0082b1b0    00000428   00000000    rw-

      0082b1b0    0082b1b0    00000428   00000000    rw- .far.2

    0082b5e0    0082b5e0    00000014   00000000    rw-

      0082b5e0    0082b5e0    00000014   00000000    rw- .far.3

    0082b600    0082b600    00001f38   00001f38    rw-

      0082b600    0082b600    00001f38   00001f38    rw- .fardata.1

    0082d540    0082d540    00000134   00000134    rw-

      0082d540    0082d540    00000134   00000134    rw- .fardata.2

    0082d680    0082d680    00000128   00000128    rw-

      0082d680    0082d680    00000128   00000128    rw- .fardata.3

    0082d7b0    0082d7b0    00000014   00000014    rw-

      0082d7b0    0082d7b0    00000014   00000014    rw- .fardata.4

    0082d7d0    0082d7d0    00000014   00000014    rw-

      0082d7d0    0082d7d0    00000014   00000014    rw- .fardata.5

    0082d7f0    0082d7f0    00000068   00000068    rw-

      0082d7f0    0082d7f0    00000068   00000068    rw- .fardata.6

    0082d860    0082d860    00000008   00000008    rw-

      0082d860    0082d860    00000008   00000008    rw- .fardata.7

    0082d870    0082d870    00000004   00000004    rw-

      0082d870    0082d870    00000004   00000004    rw- .fardata.8

    0082d880    0082d880    00000004   00000004    rw-

      0082d880    0082d880    00000004   00000004    rw- .fardata.9

    0082d890    0082d890    00000004   00000004    rw-

      0082d890    0082d890    00000004   00000004    rw- .fardata.10

    0082d8a0    0082d8a0    00000004   00000004    rw-

      0082d8a0    0082d8a0    00000004   00000004    rw- .fardata.11

    0082d8b0    0082d8b0    00000004   00000004    rw-

      0082d8b0    0082d8b0    00000004   00000004    rw- .fardata.12

    0082d8c0    0082d8c0    00000004   00000004    rw-

      0082d8c0    0082d8c0    00000004   00000004    rw- .fardata.13

    0082d8d0    0082d8d0    00000004   00000004    rw-

      0082d8d0    0082d8d0    00000004   00000004    rw- .fardata.14

    0082d8e0    0082d8e0    00000002   00000002    rw-

      0082d8e0    0082d8e0    00000002   00000002    rw- .fardata.15

    0082d8e8    0082d8e8    0000112c   00000000    rw-

      0082d8e8    0082d8e8    00001000   00000000    rw- .stack

      0082e8e8    0082e8e8    00000120   00000000    rw- .cio

      0082ea08    0082ea08    0000000c   00000000    rw- .bss

    0082ea14    0082ea14    00000025   00000025    rw-

      0082ea14    0082ea14    00000025   00000025    rw- .neardata

    0082ea3c    0082ea3c    00000048   00000048    r--

      0082ea3c    0082ea3c    00000048   00000048    r-- .rodata

    0082ea84    0082ea84    00000070   00000070    r--

      0082ea84    0082ea84    00000070   00000070    r-- .switch

    0082ec00    0082ec00    000015cc   000015cc    r-x

      0082ec00    0082ec00    00000200   00000200    r-x .vecs

      0082ee00    0082ee00    000013cc   000013cc    r-- .cinit

    0c000000    0c000000    00002378   00000000    rw-

      0c000000    0c000000    00002378   00000000    rw- .qmss

    0c002380    0c002380    00000104   00000104    rw-

      0c002380    0c002380    00000104   00000104    rw- .srioSharedMem

    0c002500    0c002500    00000180   00000000    rw-

      0c002500    0c002500    00000180   00000000    rw- .cppi

    80000000    80000000    00300000   00000000    rw-

      80000000    80000000    00180000   00000000    rw- .testData

      80180000    80180000    00180000   00000000    rw- .windowData

     

    Thank for your help!

    Brandy

     

     

  • In reply to BrandyJ:

    Hi Brandy,

    Sorry for the unclarity about this issue, it actually require the replacement of statement:

    Program.sectMap[".windowData"]         =             "DDR3";

    --->

    Program.sectMap[".windowData"].loadAddress = 0x80000000;

    If the two statement both exist, the latter one will not take effect. So you just need erase the first one in your cfg file.

    Allen

  • In reply to Allen Lee:

    Hi Allen,

    LOL - I did try to switch the order of the statements but I did not comment out the DDR3 statement.  It seems that if the DDR3 statement exists it will take priority (even if the loadAddress command was after it).

     

    Thanks, now I am happy :)

     

    Brandy