Hi,
The Bootloader user guide (spruggy5a) states:
HyperLink boot code initializes the chip-level interrupt controller to interrupt the DSP
after the boot. After setting up the interrupt configuration, the boot ROM executes an
idle instruction. The remote device loads the memory directly and generates the
HyperLink interrupt. When the boot code is awoken, the interrupt maps are restored
to their default values and the DSP branches to the address in DSP BOOT MAGIC
address. As with PCI, if the value in DSP BOOT MAGIC address is still 0 after wakeup,
the ROM again executes an idle.
HyperLink mapping can be configured by the master, but the bootloader sets up the
initial mappings.
But no information is given about what the actual HyperLink mapping setup is. Where can I find this info?
Thanks,
Joel
