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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » C6000 Multicore DSP » Keystone Multicore Forum (C66, 66A, AM5) » Resource confilct when running demo program of H264 BP Encoder on dual cores of C6678 to encoding 720P video
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    Resource confilct when running demo program of H264 BP Encoder on dual cores of C6678 to encoding 720P video

    Resource confilct when running demo program of H264 BP Encoder on dual cores of C6678 to encoding 720P video

    This question is answered
    zhao sun
    Posted by zhao sun
    on May 11 2012 04:45 AM
    Intellectual885 points

    hi all,

       I have encountered a strange issue when I run H264 BP Encoder(Version 01.24.00.01) demo program

    on C6678 platform. I need to run it on two corepacs for compressing 720P video clip. I duplicate the

    encoder0.cfg to encoder1.cfg and then do modification of related content, change the frame size to

    1280x720, change the profile and level, change the top & bottom size ,etc. the attached file is my new

    configuration file.8272.cffile.rar

        When run the program in FIFLEIO mode, it can work correctly. But when I change

    the encoding mode to "MEMORY", that is, I preload the raw video data to DDR first and then trigger

    the encoder. The 2 cores will crash after encoding one frame. I can make sure that raw video

    data does not overwrite othe data buffer because I noticed that the range of the preload data section

    defined by the demo program is 0x95000000~0x99000000, and the length of video data I load to DDR

    is less that 0x4000000.

    From IO console, I can get the resource conflict error message after entering the  "process" function:

    core0:

    A0=0x800003f4 A1=0x400f4
    A2=0x0 A3=0x90
    A4=0x80000004 A5=0x540
    A6=0x3 A7=0x2a0
    A8=0x8061e8 A9=0x8
    A10=0x808428 A11=0x0
    A12=0x801250 A13=0x80bd40
    A14=0x80000140 A15=0x843728
    A16=0x1e A17=0xe
    A18=0x540 A19=0x807c17
    A20=0x801020 A21=0x0
    A22=0x0 A23=0x1e
    A24=0x805270 A25=0x8054b0
    A26=0x8051e8 A27=0x800b80
    A28=0x800a80 A29=0x807b27
    A30=0x800a90 A31=0x800990
    B0=0x20 B1=0x1
    B2=0x800990 B3=0xc051848
    B4=0x404 B5=0x80000204
    B6=0x400 B7=0x90
    B8=0x80000204 B9=0x805308
    B10=0x80df80 B11=0x160
    B12=0x80 B13=0x800001a8
    B14=0x86caf8 B15=0x843548
    B16=0x90 B17=0x8055d8
    B18=0x3f0 B19=0x8
    B20=0x200 B21=0x8051e8
    B22=0x8051e0 B23=0x805390
    B24=0x807c89 B25=0x805420
    B26=0x805540 B27=0x8055d0
    B28=0x805300 B29=0x5
    B30=0x800b90 B31=0x843728
    NTSR=0x1020d
    ITSR=0x20d
    IRP=0xc041620
    SSR=0x10
    AMR=0x0
    RILC=0x8
    ILC=0x0
    Exception at 0xc02c0d4
    EFR=0x2 NRP=0xc02c0d4
    Internal exception: IERR=0x10
    Resource conflict exception

    Core 1:

    A0=0x860003f4 A1=0x400f4
    A2=0x0 A3=0x90
    A4=0x86000004 A5=0x540
    A6=0x3 A7=0x2a0
    A8=0x807a84 A9=0x8
    A10=0x807ecc A11=0x0
    A12=0x8019d0 A13=0x80bd40
    A14=0x86000140 A15=0x8436a8
    A16=0x1e A17=0xe
    A18=0x540 A19=0x807b27
    A20=0x801020 A21=0x0
    A22=0x0 A23=0x1e
    A24=0x8044f8 A25=0x804738
    A26=0x1fb1414 A27=0xfb010000
    A28=0xfb1414fb A29=0x0
    A30=0x0 A31=0x10
    B0=0x2 B1=0x1
    B2=0x0 B3=0xc051848
    B4=0x404 B5=0x86000204
    B6=0x400 B7=0x90
    B8=0x86000204 B9=0x804108
    B10=0x808a48 B11=0x2c8
    B12=0x80 B13=0x860001a8
    B14=0x86caf8 B15=0x8434c8
    B16=0x90 B17=0x8043d8
    B18=0x3f0 B19=0x8
    B20=0x200 B21=0x803fe8
    B22=0x804468 B23=0x804618
    B24=0x807c91 B25=0x8046a8
    B26=0x8047c8 B27=0x804858
    B28=0x804588 B29=0x14fb0100
    B30=0x1414fb01 B31=0x8436a8
    NTSR=0x1020d
    ITSR=0x20d
    IRP=0xc03c854
    SSR=0x10
    AMR=0x0
    RILC=0x8
    ILC=0x0
    Exception at 0xc02c0d4
    EFR=0x2 NRP=0xc02c0d4
    Internal exception: IERR=0x10
    Resource conflict exception

    And the related disassembly code is below:

    0c02c000             H264VENC_TI_reEvalMV:
    0c02c000             .text:H264VENC_TI_reEvalMV:
    ... ...

    0c02c0c0   063c8145 ||        STDW.D1T1     A13:A12,*-A15[4]
    0c02c0c4   00240ad9 ||        CMPLT.L1      0,A9,A0
    0c02c0c8       6bce ||        MV.S1         A7,A19
    0c02c0ca       d26b           ADD.S2X       B6,A4,B6
    0c02c0cc   041b805b ||        SUB.L2        B6,0x4,B8
    0c02c0d0   022002e7 ||        LDW.D2T2      *+B8[0],B4
    0c02c0d4   073c2074 ||        STW.D1T1      A14,*-A15[1]
    0c02c0d8   0a00e429           MVK.S1        0x01c8,A20
    0c02c0dc   e0800020           .fphead       n, l, W, BU, nobr, nosat, 0000100b
    0c02c0e0   0a0039fd ||        STW.D2T1      A20,*+B15[57]
    0c02c0e4   04c41fda ||        MV.L2X        A17,B9
    0c02c0e8   04a60e0b           EXTU.S2       B9,16,14,B9

    So I want to know why the conflict happens and what shall I do with this issue?

    Thanks a lot!

    Sunzhao

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    All Replies
    • Hongmei Gou
      Posted by Hongmei Gou
      on May 14 2012 14:09 PM
      Verified Answer
      Verified by zhao sun
      Intellectual2840 points

      Hi Sunzhao,

      For multi-core H.264BP encoding, the video range processed by each participating core needs to be multiple of 16 slice lines. For example, when 2 cores are performing 720p encoding as in your test, the configuration can be:

      Core 0:

      topSliceLine = 0

      bottomSliceLine = 352

      Core 1:

      topSliceLine = 352

      bottomSliceLine = 720

      If the number of slice lines are not multiple of 16, it can cause program memory corruption, and further DSP exception as you observed.

      Cross check on this will be added in the next release of codec, and also with corresponding documentation.

      Thanks,

      Hongmei

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    • zhao sun
      Posted by zhao sun
      on May 14 2012 22:27 PM
      Intellectual885 points

      Hongmei,

           Thank you for your help! It works now.

      Sunzhao

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