Failed to enumerate C6670EVM by using TMDXEVMPCI

Could you connect CCS to the EVM and check where the PC (program counter) is pointed when the enumeration failed please?

We would like to check which stage is stuck in the boot code.

And if the LTSSM_STATE field in DEBUG0 (0x21801728) register is not 0x11, it means there is no link up between C6670 EVM and PCIe host yet. Please check if the host could provide 100MHz PCIe reference clock to the EVM. 

Please take a look at the previous threads for the enumeration as well, such as 

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/191930/698130.aspx#698130

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/221855.aspx

Hope they will help as well.

Sincerely,

Steven

_Hi Steven,

Thanks for your reply.

Register 0x21801728   value: 0x20002800

Register DEBUG0(0x21800728)   value: 0x00000000  

How can I check host could provide 100MHz PCIe reference clock?

Target board : Gigabyte GA-8I945GMF

Thanks,

popo.

popo,

DEBUG0 is in the PCIe local configuration register space (with 0x1000 offset) so its address is 0x21801728. 

It looks like the C6670 PCIe and the host could not get link up.

The host motherboard seems to provide 100MHz reference clock to PCIe slot based on its data manual. But it might be SSC (spread spectrum clock) so the C667x should be the latest IBL update to support SSC. Some customer also mentioned that they could see the link up after trying out another host.

Could you also take a look at the PC register (CPU register view) to see where the program is stuck at in the boot up process please?

And do you have driver or will the host OS enumerate the PCIe endpoints plugged into the slot please?

Hi Steven,

Thanks for your reply.

1.

PC value is0x00190c10

PC value:

0x21801728 value:

PCIE datasheet Page 3-122:http://www.ti.com/lit/ug/sprugs6c/sprugs6c.pdf

It says DEBUG0 offset is 728h.

Is this correct or I see wrong datasheet?

2.

I re-plug into the slot but it can't find new device.

My system is: Linux Kerner 3.2.0-34 64Bits

Best Regard,

popo

popo,

Please take a look at section 2.8 in PCIe user guide that the PCIe local configuration registers space starts from 0x1000 offset. So the DEBUG0 offset is 0x728+0x1000=0x1728.

Your Program Counter is pointed to 0x20B00000, which seems not running any boot code yet. 

Could you please check if you are able to set the EVM in PCIe boot mode and the IBL could be run correctly on EVM?

You can use the external power and in PCIe boot mode, WITHOUT putting the card into the host. Can you check where the Program Counter register in the CPU (should be 0x00800xxx in LL2) and DEVSTAT (address 0x02620020, value should be 0x00001809) with an emulator to make sure IBL is correct? 

Please take a look at the following thread as well. Thanks.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/194161.aspx

Hi Steven,

Thanks for your reply.

I check register value and re-plug PCIe.

I get below value but PCIe device can't find.

PC and 0x02620020 register value:

MAGIC_ADDR(0x008FFFFC) value:

Best Regard,

popo

popo,

Are you loading another test case into the DSP core before you check those registers values please?

Please load nothing and just let the C66x device run in PCIe boot mode.

Please follow the steps below:

1. Put C66x card switch pins in PCIE boot mode and assembled in the adaptor card
2. Insert card in a Linux PC and turn the power on, make sure card is enumerated (e.g., check with “lspci” from Linux machine)
3. Connect the core 0 of DSP via an emulator, and the core 0 will be halted. The PC (program counter) register is at 0x00800xxx (local L2) and please check if PCIE link is up (register 0x21801728, bit 0-4 is 0x11)

If the PCIe could not get link up, the IBL will be stuck at the place checking DEBUG0 (0x21801728) register. The LTSSM_STATE field (bit[4:0]) should be 0x11 if the link is up.

And I am wondering if your IBL is updated correctly. First, may I ask if you are using C6670 EVM or C6678 please?

In your original post,  you mentioned "i2crom_0x51_c6678_le.bin". Please use the correct .bin file for your EVM (i2crom_0x51_c6670_le.bin for C6670 EVM)

And for the boot mode switch setup, please take a look at the following wiki page:

http://processors.wiki.ti.com/index.php/TMDXEVM6670L_EVM_Hardware_Setup

The No Boot mode seems to be 

switch pin 1   2   3   4
SW3:      off on on on
SW4:      on on on on
SW5:      on on on on
SW6:      on on on on

And for the EEPROM programming, I am not sure if it is 0x80000000 or 0x0c000000. Please check the "eepromwriter.c" file to see how the "WRITE_DATA_ADDRESS" is defined.

Hope you can update the IBL correctly and please check the PC and DEBUG0 register again if the enumeration fails. 

Hi Steven,

Thanks for your reply.

I have C6670 EVM and C6678 EVM and I used C6670 EVM.

I load "C:\ti\mcsdk_2_01_02_05\tools\boot_loader\examples\pcie\pcieboot_helloworld" lib file to C6670 DSP board and have correct switch Boot mode.

Does it correct IBL file or not?

But I can't use "lspci " command see any device in Linux host.

When I use emulator to see memory register I got same result on Dec 20 2012 21:37 PM

Best Regard,

popo

popo,

What I suggested is not to load any test case into the device otherwise the PC register could be pointing to other place.

So could you please repeat your register observation steps without loading "pcieboot_helloworld" file please?

We should let the EVM run the boot code (IBL) only and see where it is stuck. Thanks.

Hi Steven,

Thanks for your reply.

IBL file is:

C:\ti\mcsdk_2_01_02_05\tools\boot_loader\ibl\src\make\bin\i2cparam_0x51_c6670_le_0x500.out

C:\ti\mcsdk_2_01_02_05\tools\boot_loader\ibl\src\make\bin\i2crom_0x51_c6670_le.bin

I update this file to DSP board but Linux host still can't find PCIE device.

Register value:

PC:0x00800974

0x008FFFFC:0x00803320

0x02620020:0x00001809

Best Regard,

popo

popo,

The PC register is 0x00800974, which seems to indicate the PLL is not locked (bit[0] in PCIE_SERDES_STS register). Could you please check the PCIE_SERDES_STS register value as well? We would like to know if the PLL could be locked in your setup.

Hi Steven,

Thanks for your reply.

Is PCIE_SERDES_STS  address 0x0162015C?

This address value is 0x0000040C

Best Regard,

popo

The address is 0x0262015c. Please take a look at section 2.3.1.2 in PCIe user guide.

Hi Steven,

Thanks for your reply.

This address value is 0x0000030C

Best Regard,

popo

popo,

It seems the PCIe  PLL is not locked (bit[0] =0 in PCIE_SERDES_STS register).

I mentioned some notes in IBL update proceduer before. Could you please double check if the IBL has been updated on 6670 EVM correctly please? 

Please the comments as follows for your original setup:

- mcsdk_2_01_02_05

1. Programing "IBL" on the EEPROM at bus address 0x51

1.1 set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM: (is the switch right?)

switch pin1 2 3 4
SW3: off on on on
SW4: on on on on
SW5: on on off on ================> on on on on
SW6: off on on on ================> on on on on
SW9: on
1.2 copy i2crom_0x51_c6678_le.bin which exits in tools\boot_loader\ibl\src\make\bin to =============> should be 6670, not 6678

writer\eeprom\evmc66xxl\bin folder. Then open writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt, and set the

file_name to i2crom_0x51_c6678_le.bin. ====================> should be 6670, not 6678

1.3 Open CCSv5,connect to core0.
1.4 Load writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS,and has loaded the evmc66xxl.gel in advance.

1.5 Open Memory Browser,view the Memory 0x80000000. Load i2crom_0x51_c6670_le.bin to 0x80000000. =========> the address should be 0x0c000000
1.6 Press "F8" to run the program,and "EEPROM programming completed successfully" is printed on the console.

2. Programing "IBL Configuration" ===========================> no need for this 
After the first step, go on this step directly.
2.1 Open CCSv5,connect to core0.
2.2 Load tools\boot_loader\ibl\src\make\bin\i2cparam_c6670_le.out to CCS. Run the program,and"Run the GEL for

the device to be configured,press return to program the I2C" is printed on the console.
2.3 Load tools\boot_loader\ibl\src\make\bin\i2cConfig.gel in the GEL Files window.
2.4 Run the GEL script "EVM c6670 IBL"->setConfig_c6670_main, and then press"Enter"in the CCS console window.

The message "I2c table write complete" is printed on the CCS console.
3. Set C6670 EVM to PCIE boot mode:(is the switch right?)
switch pin1 2 3 4
SW3: off on on off
SW4: on on on on
SW5: on on on off
SW6: off on on on

Please update the IBL on your 6670 EVM again (it should be fine no matter you update IBL configuration or not).

If you still see the PLL not being locked, please try another host machine or AMC-to-PCIe card. We need to get over the reference clock PLL issue first for the enumeration.