This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

IPC interrupt

I want to use the IPC interrupt between the cores. I found that the IPC register locate in the BOOTCFG area so the access to those registers must follow be unlock the KICK registers.

1. If I want to use the IPC in my application, shall i unlock the KICK registers at the initialization and leave it unlock during the application processing.

2. What is the logic to locate the IPC registers in the BOOTCFG area?

 

  • We also found that we have to enable kick registers

    and can't find the logic for locating IPC registers in BOOTCFG area.

    would be happy to get an exaplanation on the idea behind kick registers 

    and the reason to put IPC registers there.

  • Hi Jim, Ilay,

    The idea behind the the KICK register mechanism is to to prevent any spurious writes from changing any of the Bootcfg MMR values.The kicker mechanism is unlocked by the ROM code so it is recommended not to write any other values after boot to these registers because that will lock the kicker mechanism and block any writes to Bootcfg registers.

    The idea behind having the IPC registers in the BOOTCFG region was that the ROM bootloader executes IDLE instructions on the secondary core pacs and keeps the secondary core pacs waiting for an IPC interrupt from core 0. Once the application code for the secondary core pacs is loaded , the core pac 0 issues an IPC interrupt, to wake up the secondary cores and branches to the address specified by the BOOT MAGIC address.

    Please let us know if you need any further clarification.

    Regards,

    Rahul

  • Rahul,

    The mechanism you described is well known, but the IPC interrupt mechanism is supported by the 6678 not only for the Bootloader mechanism but for generel IPC mechanism too, and this IPC interrupts can't be used without unloncking the Bootcfg region.

    So the question is why to tie the IPC interrupts registers to the Bootcfg region? The Bootloader mechanishm of wake up cores 1-7 is still available event if the IPC interrupts regiters are not part of the Bootcfg region?

    Regards,

  • Hi, . Can you use IPC registers to generate interrupts to other cores in your application? thanks