• State TI Thinks Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 2 answers
  • Subscribers 102 subscribers
  • Views 1409 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

c6678 master core reset slave core

si cheng
Expert 2685 points

hi：

I want to use core0 to reset slave core, and then load another app from flash to other cores, and the make it run. What should I do ?

 

Best Regards

Si

 

  • 0
    TI__Genius 9065 points

    Hello,

    I am not sure of which bootmode you use but here is what I would suggest:

    1) According to bootloader user's guide (SPRUGY5B):

    During the boot process, the bootloader executes an IDLE command on the
    secondary CorePacs and keeps the secondary CorePacs waiting for an interrupt.
    After the application code to be loaded in these secondary CorePacs are loaded
    and the BOOT_MAGIC_ADDRESS in individual corePacs are populated, the
    application code in the corePac0 can trigger the IPC interrupt to wake up the
    secondary cores and branch up to the address specified in the
    BOOT_MAGIC_ADDRESS.

    2) When you boot, you load all cores, and then master core will wake up all other cores and make all cores run.

    I am sharing an example code below:

    =====================================

    #define DEVICE_REG32_W(x,y)   *(volatile uint32_t *)(x)=(y)
    #define DEVICE_REG32_R(x)    (*(volatile uint32_t *)(x))

    #define MAGIC_ADDR     0x87fffc

    #define BOOT_MAGIC_ADDR(x)  (MAGIC_ADDR + (1<<28) + (x<<24))
    #define IPCGR(x)            (0x02620240 + x*4)
    #define KICK0             (0x2620038)
    #define KICK1              (0x262003C)

    for (core = 1; core < 8; core++)
     {
                DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), entry_addr);
                DEVICE_REG32_W(KICK0, 0x83e70b13);
                DEVICE_REG32_W(KICK1, 0x95a4f1e0  );
                DEVICE_REG32_W(IPCGR(core), 1);
                add_some_delay_if_desired(200);
     }

    This runs on core 0 which is the master core during boot.

    best regards,

    David Zhou

  • 0 in reply to dzhou
    Expert 2685 points

    David Zhou,

    thanks for your relpy. Maybe I don't express my idea more clearly.Now I will.

    master core: core0, slave core:core1~core7

    I have two apps need to run on slave core, the two apps all stored in flash, when startup, master core load app1 to slave cores, and the slave core all run app1, and when

    master core receive command from network, it need to load app2 from flash to slave core,and make them run. So before master core load app2 to other slave core ,

     it need to reset them first, and the load app2. But now I don't know how the master core reset the slave core, and then when loadover the app2, how to make slave core to

    run? This is my problem!

    best regards,

    Si

     

  • 0 in reply to si cheng
    Expert 2685 points

    and I know when by the Jtag, we can reset every core in the CCS IDE, So I think it should be a reset register in every core's  core registers. But I don't find it

     

  • 0 in reply to si cheng
    TI__Genius 9065 points

    Hello,

    You can search for "Reset Controller" in the datasheet. This is called C66x CorePac local reset, where you can use software to reset through LPSC MMR registers. PSC is power sleep controler. You can find more details in PSC user's guide.

    However, boot process don't get triggered by local reset.

    best regards,

    David Zhou