Hi, all
We are facing a problem, when we store the codes in L2SRAM by bootloader, the program runs smoothly.
When we store the codes in L2SRAM by JTAG, the program runs smoothly.
When we store some of the codes in DDR3 by JTAG, the program runs smoothly.
But when we store some of the codes in DDR3 by Bootloader, the core get abort when first calling the funtion stored in DDR3. Our codes are getting bigger and bigger, we should put some of the codes in DDR3.
We are using TMSC6670 SPI norflash boot directly(no IBL, not EVM)on our board. And Rahul gave us a reference named "SPIboot_ddr.zip", and I think that the reference is for TMSC6657 DSP, please look at
C:\ti\mcsdk_2_01_02_06\tools\boot_loader\ibl\src\device\c66x\tiboot_c66x.h
The emif4config table doesn't have a chipConfig[64] array.
C:\ti\mcsdk_2_01_02_06\tools\boot_loader\ibl\src\device\c66x\tiboot_c665x.h (the same as tiboot.h in "SPIboot_ddr.zip")
The emif4config table has a chipConfig[64] array.
So, I think C6670 and C6657 are using different bootloaders, and the "SPIboot_ddr.zip" is completly for C6657.
The problem is, in our situation, how could we config the chipConfig[64] array acorrding to our TMSC6670 bootloader? Hoping to your reply, thank you.
Best regards
Karlphy