TI E2E Community
Digital Signal Processors (DSP)
C6000 Multicore DSP
Keystone Multicore Forum (C66, 66A, AM5)
C6671 DDR3 DDR_SDCFG Hang
I'm trying to bring up the DDR3, MT41J128M16, on a custom board using a TMS320C6671. I have modified the GEL scripts using the "DDR PHY Calc v10" and the "DDR3 Register Calc v4" spreadsheets to reflect the differences in my hardware.
My emulator will disconnect after I write to the DDR_SDCFG register AND do any additional write. I can write to the register and read any location. Below is a small clip of my GEL script. Please note that the disconnection is BEFORE the leveling is enabled.
DDR_SDCFG = 0x7b03aab3;//Wait 600us for HW init to completeDelay_milli_seconds(1);
Display_DDR_Status();GEL_TextOut(" DDR_SDCFG ---> %x \n\n",,,,,(unsigned int)DDR_SDCFG);GEL_TextOut(" DDR_SDRFC ---> %x \n\n",,,,,(unsigned int)DDR_SDRFC);DDR_SDRFC = 0x00000208; //Refresh rate = (7.8*666MHz) <-- Will cause emulator to disconnect.
Any clues as what could cause this?
My initial thought is this may have to be moved to the Code Composer Studio Forum. But let me get some details from you since we have not experienced this with our EVMs.
- Can you paste the exact error message or a snapshot of the error?
- Do you have an EVM that can reproduce this issue?
- What CCS version are you using?
- Are you running Windows or Linux?
This may very well be a CCS \ Emulator problem. This morning I have had some success in getting the DDR configured and running. The difference being that I'm not viewing any registers in the "Memory Browser".
At this point I consider this issue closed. Thanks for you reply.
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