Hi,
I have a Keystone I EVM and I need to boot kernel in hyp mode. Does anybody have any idea on how to configure uboot to boot the kernel in hyp mode ?
Thanks,
Jose
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
I have a Keystone I EVM and I need to boot kernel in hyp mode. Does anybody have any idea on how to configure uboot to boot the kernel in hyp mode ?
Thanks,
Jose
Hi, Rex,
I want to switch the keystone EVM into hyp mode it seems it stuck while changing the mode.
Diff and Screen short is listed below::
Diff::
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5263e9c..3960d04 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -41,7 +41,7 @@ _start: b reset
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
- ldr pc, _not_used
+ ldr pc, _hyp_trap
ldr pc, _irq
ldr pc, _fiq
#ifdef CONFIG_SPL_BUILD
@@ -49,7 +49,7 @@ _undefined_instruction: .word _undefined_instruction
_software_interrupt: .word _software_interrupt
_prefetch_abort: .word _prefetch_abort
_data_abort: .word _data_abort
-_not_used: .word _not_used
+_hyp_trap: .word _hyp_trap
_irq: .word _irq
_fiq: .word _fiq
_pad: .word 0x12345678 /* now 16*4=64 */
@@ -58,12 +58,31 @@ _undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
-_not_used: .word not_used
+_hyp_trap: .word hyp_trap
_irq: .word irq
_fiq: .word fiq
_pad: .word 0x12345678 /* now 16*4=64 */
#endif /* CONFIG_SPL_BUILD */
+
+/* HYP-VNL
+ *Routine to initialize CPU interface, switch to HYP mode.
+ * r0-r3 to comply with both the C ABI and the requirement of SMP startup
+ * code.
+ */
+
+.globl _hyp_vnl_switch
+_hyp_vnl_switch:
+ mov r0, lr
+ mov r1, sp @ save SVC copy of LR and SP
+ isb
+ .byte 0x70, 0x00, 0x40, 0xe1 @ for newer hvc #0 || for older asm: .byte 0x70, 0x00, 0x40, 0xe1
+ mov sp, r1
+ mov lr, r0 @ restore SVC copy of LR and SP
+
+ bx lr
+
+
.global _end_vect
_end_vect:
@@ -140,6 +159,28 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
+/* HYP-VNL
+ * Setup vector:
+ * (k2hk TEXT_BASE is not 32 byte aligned.
+ * Continue to use ROM code vector only in k2hk)
+ */
+#if !(defined(CONFIG_K2HK_EVM))
+ /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
+ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register
+ bic r0, #CR_V @ V = 0
+ mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register
+
+ /* Set vector address in CP15 VBAR register */
+ ldr r0, =_start
+ mcr p15, 0, r0, c12, c0, 0 @Set VBAR
+
+ mrc p15, 0, r1, c0, c1, 1 @ check for security extension
+ ands r1, r1, #0x30
+ mcrne p15, 0, r0, c12, c0, 1 @ Set secure monitor MVBAR
+#endif
+
+ /* the mask ROM code should have PLL and others stable */
+
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -474,9 +515,21 @@ undefined_instruction:
.align 5
software_interrupt:
- get_bad_stack_swi
- bad_save_user_regs
- bl do_software_interrupt
+ mrc p15, 0, r1, c1, c1, 0 @ read SCR
+ bic r1, r1, #0x07f
+ orr r1, r1, #0x31 @ enable NS, AW, FW
+ mrc p15, 0, r0, c0, c1, 1 @ check for Virt ext
+ and r0, r0, #0xf000
+ cmp r0, #0x1000
+ orreq r1, r1, #0x100 @ allow HVC instruction
+
+ mrc p15, 0, r0, c12, c0, 0 @ save secure copy of VBAR
+ mcr p15, 0, r1, c1, c1, 0 @ write SCR, switch to non-sec
+ isb
+ mcr p15, 0, r0, c12, c0, 0 @ write non-secure copy of VBAR
+ mcreq p15, 4, r0, c12, c0, 0 @ write HYP mode HVBAR
+
+ movs pc, lr
.align 5
prefetch_abort:
@@ -491,10 +544,9 @@ data_abort:
bl do_data_abort
.align 5
-not_used:
- get_bad_stack
- bad_save_user_regs
- bl do_not_used
+hyp_trap:
+ .byte 0x00, 0xe3, 0x0e, 0xe1 @ mrs lr, elr_hyp
+ mov pc, lr
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index ad9a875..cbc1929 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -73,4 +73,7 @@ void v7_outer_cache_inval_all(void);
void v7_outer_cache_flush_range(u32 start, u32 end);
void v7_outer_cache_inval_range(u32 start, u32 end);
+/* HYP-VNL */
+int armv7_switch_hyp(void);
+
#endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index f274024..2f89276 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -55,6 +55,9 @@ COBJS-y += reset.o
COBJS-y += cache.o
COBJS-y += cache-cp15.o
+# HYP-VNL
+COBJS-y += virt-v7.o
+
SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
$(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/common/Makefile b/common/Makefile
index 4fa79af..0ecc795 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -48,6 +48,10 @@ COBJS-y += env_attr.o
COBJS-y += env_callback.o
COBJS-y += env_common.o
COBJS-y += env_flags.o
+COBJS-y += cmd_myprint.o
+# test cmd
+COBJS-y += cmd_myprint.o
+
COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
XCOBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
@@ -123,6 +127,8 @@ COBJS-y += cmd_load.o
COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o
COBJS-$(CONFIG_CMD_MD5SUM) += cmd_md5sum.o
+# HYP-VNL
+COBJS-$(CONFIG_CMD_VIRT) += cmd_virt.o
COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o
COBJS-$(CONFIG_CMD_IO) += cmd_io.o
COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index a362cb8..b22145f 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -23,6 +23,7 @@
/* Platform type */
#define CONFIG_SOC_K2HK
#define CONFIG_K2HK_EVM
+#define CONFIG_CMD_VIRT
/* Board specific default environment variables */
#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
Screen short ::
Regards,
Arun
Hi, Rex,
I want to switch the keystone EVM into hyp mode, it seems it stuck while changing the mode.
It stuck into this piece of code here i am swiching the mode into hyp mode ...
+.globl _hyp_vnl_switch
+_hyp_vnl_switch:
+ mov r0, lr
+ mov r1, sp @ save SVC copy of LR and SP
+ isb
+ .byte 0x70, 0x00, 0x40, 0xe1 @ for newer hvc #0 || for older asm: .byte 0x70, 0x00, 0x40, 0xe1
+ mov sp, r1
+ mov lr, r0 @ restore SVC copy of LR and SP
+
+ bx lr
+
Diff and Screen short is listed below::
Diff::
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5263e9c..3960d04 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -41,7 +41,7 @@ _start: b reset
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
- ldr pc, _not_used
+ ldr pc, _hyp_trap
ldr pc, _irq
ldr pc, _fiq
#ifdef CONFIG_SPL_BUILD
@@ -49,7 +49,7 @@ _undefined_instruction: .word _undefined_instruction
_software_interrupt: .word _software_interrupt
_prefetch_abort: .word _prefetch_abort
_data_abort: .word _data_abort
-_not_used: .word _not_used
+_hyp_trap: .word _hyp_trap
_irq: .word _irq
_fiq: .word _fiq
_pad: .word 0x12345678 /* now 16*4=64 */
@@ -58,12 +58,31 @@ _undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
-_not_used: .word not_used
+_hyp_trap: .word hyp_trap
_irq: .word irq
_fiq: .word fiq
_pad: .word 0x12345678 /* now 16*4=64 */
#endif /* CONFIG_SPL_BUILD */
+
+/* HYP-VNL
+ *Routine to initialize CPU interface, switch to HYP mode.
+ * r0-r3 to comply with both the C ABI and the requirement of SMP startup
+ * code.
+ */
+
+.globl _hyp_vnl_switch
+_hyp_vnl_switch:
+ mov r0, lr
+ mov r1, sp @ save SVC copy of LR and SP
+ isb
+ .byte 0x70, 0x00, 0x40, 0xe1 @ for newer hvc #0 || for older asm: .byte 0x70, 0x00, 0x40, 0xe1
+ mov sp, r1
+ mov lr, r0 @ restore SVC copy of LR and SP
+
+ bx lr
+
+
.global _end_vect
_end_vect:
@@ -140,6 +159,28 @@ reset:
orr r0, r0, #0xd3
msr cpsr,r0
+/* HYP-VNL
+ * Setup vector:
+ * (k2hk TEXT_BASE is not 32 byte aligned.
+ * Continue to use ROM code vector only in k2hk)
+ */
+#if !(defined(CONFIG_K2HK_EVM))
+ /* Set V=0 in CP15 SCTRL register - for VBAR to point to vector */
+ mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTRL Register
+ bic r0, #CR_V @ V = 0
+ mcr p15, 0, r0, c1, c0, 0 @ Write CP15 SCTRL Register
+
+ /* Set vector address in CP15 VBAR register */
+ ldr r0, =_start
+ mcr p15, 0, r0, c12, c0, 0 @Set VBAR
+
+ mrc p15, 0, r1, c0, c1, 1 @ check for security extension
+ ands r1, r1, #0x30
+ mcrne p15, 0, r0, c12, c0, 1 @ Set secure monitor MVBAR
+#endif
+
+ /* the mask ROM code should have PLL and others stable */
+
/*
* Setup vector:
* (OMAP4 spl TEXT_BASE is not 32 byte aligned.
@@ -474,9 +515,21 @@ undefined_instruction:
.align 5
software_interrupt:
- get_bad_stack_swi
- bad_save_user_regs
- bl do_software_interrupt
+ mrc p15, 0, r1, c1, c1, 0 @ read SCR
+ bic r1, r1, #0x07f
+ orr r1, r1, #0x31 @ enable NS, AW, FW
+ mrc p15, 0, r0, c0, c1, 1 @ check for Virt ext
+ and r0, r0, #0xf000
+ cmp r0, #0x1000
+ orreq r1, r1, #0x100 @ allow HVC instruction
+
+ mrc p15, 0, r0, c12, c0, 0 @ save secure copy of VBAR
+ mcr p15, 0, r1, c1, c1, 0 @ write SCR, switch to non-sec
+ isb
+ mcr p15, 0, r0, c12, c0, 0 @ write non-secure copy of VBAR
+ mcreq p15, 4, r0, c12, c0, 0 @ write HYP mode HVBAR
+
+ movs pc, lr
.align 5
prefetch_abort:
@@ -491,10 +544,9 @@ data_abort:
bl do_data_abort
.align 5
-not_used:
- get_bad_stack
- bad_save_user_regs
- bl do_not_used
+hyp_trap:
+ .byte 0x00, 0xe3, 0x0e, 0xe1 @ mrs lr, elr_hyp
+ mov pc, lr
#ifdef CONFIG_USE_IRQ
diff --git a/arch/arm/include/asm/armv7.h b/arch/arm/include/asm/armv7.h
index ad9a875..cbc1929 100644
--- a/arch/arm/include/asm/armv7.h
+++ b/arch/arm/include/asm/armv7.h
@@ -73,4 +73,7 @@ void v7_outer_cache_inval_all(void);
void v7_outer_cache_flush_range(u32 start, u32 end);
void v7_outer_cache_inval_range(u32 start, u32 end);
+/* HYP-VNL */
+int armv7_switch_hyp(void);
+
#endif
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index f274024..2f89276 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -55,6 +55,9 @@ COBJS-y += reset.o
COBJS-y += cache.o
COBJS-y += cache-cp15.o
+# HYP-VNL
+COBJS-y += virt-v7.o
+
SRCS := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
$(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
diff --git a/common/Makefile b/common/Makefile
index 4fa79af..0ecc795 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -48,6 +48,10 @@ COBJS-y += env_attr.o
COBJS-y += env_callback.o
COBJS-y += env_common.o
COBJS-y += env_flags.o
+COBJS-y += cmd_myprint.o
+# test cmd
+COBJS-y += cmd_myprint.o
+
COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o
COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o
XCOBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o
@@ -123,6 +127,8 @@ COBJS-y += cmd_load.o
COBJS-$(CONFIG_LOGBUFFER) += cmd_log.o
COBJS-$(CONFIG_ID_EEPROM) += cmd_mac.o
COBJS-$(CONFIG_CMD_MD5SUM) += cmd_md5sum.o
+# HYP-VNL
+COBJS-$(CONFIG_CMD_VIRT) += cmd_virt.o
COBJS-$(CONFIG_CMD_MEMORY) += cmd_mem.o
COBJS-$(CONFIG_CMD_IO) += cmd_io.o
COBJS-$(CONFIG_CMD_MFSL) += cmd_mfsl.o
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index a362cb8..b22145f 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -23,6 +23,7 @@
/* Platform type */
#define CONFIG_SOC_K2HK
#define CONFIG_K2HK_EVM
+#define CONFIG_CMD_VIRT
/* Board specific default environment variables */
#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
/* End of patch */
Screen short ::
Regards,
Arun
Hi, Arun,
TI development team is working on the HYP mode support and just got implemented on AM57x platforms. Due to the architecture difference, it is implemented in AM57x ROM code, but in KS2, it will be in boot monitor. In case you can't wait for KS2 implementation, here is a sample code from AM57x to eanble HYP mode as a reference.