Configuration file for the C6678 DDR controller using the MT41J256M16 in a 64-bit topology

Noam Stein

Prodigy 180 points

Hi,

I'm using 4 of the MT41J256M16 (64 bit wide) DDR3 devices implemented in a single-rank topolgy with the C6678.

Is there a ready made configuration file for the C6678's DDR registers for this setup?

BR,

Noam

over 9 years ago

0 Bill Taboada over 9 years ago

TI__Mastermind 42545 points

Hi Noam,

You will need to populate the PHY calc and Reg calc spreadsheets to get the configuration registers for your design. Once you've generated the values you need, it's easy to substitute them into the configuration Gel provided with the EVM.

Regards, Bill

0 Noam Stein over 9 years ago in reply to Bill Taboada

Prodigy 180 points

Thanks Bill,

What do I fill in DQS_ECC & CK_ECC if ECC is not used?

BR,

Noam

0 Bill Taboada over 9 years ago in reply to Noam Stein

TI__Mastermind 42545 points

Hi Noam,

If you don't have ECC populated, you can leave these cells as 0.

Regards, Bill

0 Torsten Geist over 8 years ago

Prodigy 30 points

Hi Noam,
I'm using also 4 Chip DDR III (64 bit wide) devices in an single-rank topolgy with the C6678,
and have some Problems, is it possible that you send me the PHY calc and Reg calc spreadsheets from your design, thanks;

Regards Torsten

0 Noam Stein over 8 years ago in reply to Torsten Geist

Prodigy 180 points

Hi Torsten,

Sorry, but due to company policy, I can't send you files from the internal network.
If you send me your files, I'll be happy to help you by filling in the cells that are different and send them back to you.

BR,
Noam

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Configuration file for the C6678 DDR controller using the MT41J256M16 in a 64-bit topology