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Code loaded to DSP from PCIe bus is not running after magic address is populated

Hi,

I have the same issue as described here :

When I power my computer, the DSP is connected via PCIe connection and the switches are in ROM PCIE Boot. In this state I am booting with IBL (am i correct? I am using version 02 of FPGA).

I am loading my program and after changing the magic address nothing is happening.

1. Is the simple "wait boot" program to Core0 

(which discussed here : http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/272915.aspx)

is needed for booting process ? In my opinion, The IBL should handle the jump to magic value. Why do I need this simple "wait boot" program to Core0 ?

2. How can I load this simple "wait boot" program to Core0 without JTAG in CCS? For loading such a program I need to boot. 

 

Thanks,

Ivgeni.