C6678 Hyperlink with Integre Core

Talha Rasheed

I am using the Hyperlink interface to communicate between C6678 and Integretek core. I can read local and remote registers; how can I determine which address the FPGA writes (DMA's) the data on the DSP side to?

over 9 years ago

0 Ganapathi Dhandapani95 over 9 years ago

TI__Mastermind 28085 points

Hi Talha,

Please take a look at section "2.7.4 Address Translation" and "2.7.4.2.3 Example of Address Translation" on Hyprelink user guide document(SPRUGW8C).

Thanks,

0 Talha Rasheed over 9 years ago in reply to Ganapathi Dhandapani95

Prodigy 50 points

I have a quick question/clarification after reading the user guide, where it refers to Rx Address; is it the one starting from the hyperlink base address? (In my case, 0x4000_0000)

0 Ganapathi Dhandapani95 over 9 years ago in reply to Talha Rasheed

TI__Mastermind 28085 points

Hi Talha,

Refer TI MCSDK Hyperlink example project (\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects\hyplnk_exampleProject) code.

Address Translation:

- DSP1 (Tx) can view max. 256MB of DSP2 (Rx) memory.

- Tx side: HyperLink memory space is 0x4000_0000 to 0x4FFF_FFFF

- Rx side: HyperLink memory space is device dependent, but typically somewhere in the 0x0000_0000 to 0xFFFF_FFFF address range (For example: DDR 0x8000_0000 to 0x8FFF_FFFF)

- Requires mechanism to convert local (Tx) address to remote (Rx) address - The local side (Tx side) manipulates the address, the remote side (Rx) does address translation

Take a look at below thread:

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/198792/709820.aspx#709820

Thanks,

0 Ganapathi Dhandapani95 over 9 years ago in reply to Ganapathi Dhandapani95

TI__Mastermind 28085 points

Refer Address translation section on c66xx keystone hyperlink training document

http://keystone-workshop.googlecode.com/svn/tags/TAG_LONDON_03_27_2012/pdf/Intro%20to%20Hyperlink.pdf

Thanks,

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C6678 Hyperlink with Integre Core