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How to map MSM as uncached memory?

Hi,

We have some interprocess communication code which frequently exchanges small amounts of data via the multicore shared memory. As lot of cycles are spent inside the cache flushing routines, we are looking for ways to map MSM to another location where it can be written to via uncached writes (they are buffered in the write buffer anyway) - reads would still be performed using the "native" MSM address which should still be cached.

Currently we can achieve this behaviour using the hyperlink interface (writing to the a hyperlink-mapped address is uncached by default, however the received can read the memory using its local address which results in cached reads) - however we would like to do it locally too.

I've seen some similar questions, but didn't find any code which illustrates how to do this.
Therefore, any help, especially example code would be highly appreciated.

Thank you in advance, Clemens

  • Hi Clemens,

    We are working with expert to answer your query. 

    Thank you for your patience.

  • Is there any update regarding mapping MSM as uncached memory?
    I know the C66-architecture quite well, except for it's memory management unit & the MPAX registers, so I would grateful for assistance in this area.

  • Hi Clemens,

    for CPU access, you have to configure the MPAX unit within each CorePac. 32-bit logical addresses are translated into 36-bit physical addresses in this unit (see Memory Map Summary in the device Data Manual for address ranges). There are 16 segment register pairs available. At power-up, segments 0 and 1 are configured with default values for access to all system memory (Seg. 0: 0x00000000...0x7FFFFFFF and Seg. 1: 0x80000000...0xFFFFFFFF > DDR3). Segments with higher numbers have higher priority. Therefore, smaller segments with higher priorities can be placed within a larger segment with lower priority.

    Example:

    #include <ti/csl/csl_xmc.h>
    #include <ti/csl/csl_xmcAux.h>

    // Helper function for configuration of a XMC MPAX segment
    int SetXMC_MPAX(int mapIndex, unsigned int localAddress, unsigned long long physAddress, unsigned int segSize)
    {
        CSL_XMC_XMPAXH mpaxh;
        CSL_XMC_XMPAXL mpaxl;

        if (mapIndex < 0)
        {
            // Search for a free segment
            for (mapIndex=2; mapIndex<16; mapIndex++)
            {
                CSL_XMC_getXMPAXH(mapIndex, &mpaxh);
                if (mpaxh.segSize == 0)
                    break;
            }
            if (mapIndex == 16)
                return -1;
        }

        mpaxl.ux    = 1;
        mpaxl.uw    = 1;
        mpaxl.ur    = 1;
        mpaxl.sx    = 1;
        mpaxl.sw    = 1;
        mpaxl.sr    = 1;
        mpaxl.rAddr = physAddress >> 12;
        mpaxh.bAddr = localAddress >> 12;
        mpaxh.segSize = (segSize == 0) ? 0 : (30 - _lmbd(1, segSize));
        CSL_XMC_setXMPAXL(mapIndex, &mpaxl);
        CSL_XMC_setXMPAXH(mapIndex, &mpaxh);

        return mapIndex;
    }

    void InitSegments()
    {
    // Place 4MB of MSM at address 0x50000000 using a free segment index
        SetXMC_MPAX(-1, 0x50000000, 0x0C000000, 4<<20 /*4 MB*/);
    }

    The segment size needs to be a power of 2 and at least 4kB.
    Cache should normally be disabled unless you change the setting in the corresponding MAR register.

    Please note that the XMC MPAX unit will only enable the CorePac the use the mapped segments. For other masters like EDMA you also need to configure the MPAX unit of the MSMC (SMS and SES MPAX).

    Ralf

  • Hello Ralf,

    Thanks a lot for your ongoing support - I am very glad there are still experts arround willing to help - even if they do not work for TI`s support team ;)

    I'll give your code a try tomorrow - thanks for even adapting it to MSM.


    Thank you very much & best regards, Clemens

  • Hi Ralf,

    Thank you for the answer. Please continue to contribute more to e2e forum. Your effort is very much appreciated.