ARM frequency setting in Keystone K2H

Hi Akshata,

Are you using the K2H EVM? How are you initializing the K2H device? Through GEL file in CCS or using the uboot images in MCSDK 3.x.

Please take a look at the DEVSPEED register (0x02620C98) in your device, which indicates the default clock speed supported for both C66 and ARM cores.

The reference clock input of PLL on EVM is specified in K2H EVM TRM, such as "Figure 2.2: EVM Clock Domains" in the TRM below, which could be used to program the PLL configuration.

http://wfcache.advantech.com/www/support/TI-EVM/download/XTCIEVMK2X_Technical_Reference_Manual_Rev1_0.pdf

It is recommended to program the PLL output to the clock frequency specified in DEVSPEED. Gel file provides you hot menus to configure the Tetris to different frequencies.

Please refer to section 8.1.4 in the K2H datasheet to see how to modify the device frequency based on the input clock used.

Regards,.

Rahul

Hi Rahul,

   Thank you. I am initializing K2H device using uboot images . Can you let me know how can the clock frequency checked and modified using this ?

Regards,

Akshatha

Thanks Rajasekaran .

I am able to set the frequency to desired value .

Thanks ,

Akshatha H

Hi,

Thank you for the update.

Hi Rajasekaran ,

     I would like to know default cache configurations set for  L1 data , L1 program and L2 memory for ARM cores of  K2H EVM (XTCIEVMK2X) .

Thanks ,

Akshatha H