How to configure PHY

Jens Biltoft

Other Parts Discussed in Thread: TMS320C6657, SYSBIOS

I am working on a board with at C6657 DSP and a Marvel Alaska 88E1512 PHY. An I would like to get the Client application to run on this board.

I have read in other threads that you do not support other PHY than the one on the EVM, so I do not expect that you can tell me WHAT to write in the different registers in the Alaska 88E1512 PHY, but I was hoping you could help me by explaning HOW to wite to the PHY, using the MDIO interface.

When I run the Client example the program gets stuck in the function emac_open where it waits for the link to come up, so I guess that sometime before the program get to this point I have to write some configuration stuff to the PHY.

So the question is WHERE should I put the code that does the configuration of the PHY and HOW do I use the MDIO to communicate with the PHY?

As I am completely new to the world of ethernet communication, you need to make it spelled out and explicit for me to understand :-)

Best reagrds

Jens

over 9 years ago

0 Pubesh over 9 years ago

TI__Mastermind 20790 points

Jens,

I have answered similar query at the below E2E thread,

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/360251/1278074.aspx#1278074

I am discussing with team for 88E1512 PHY configuration, I will share the details If I get.

0 Pubesh over 9 years ago in reply to Pubesh

TI__Mastermind 20790 points

Jens,

See the below E2E post and Wiki page to get some details,

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/t/243401.aspx

http://processors.wiki.ti.com/index.php/Guidelines_when_porting_NDK_to_different_PHYs

0 Pubesh over 9 years ago in reply to Pubesh

TI__Mastermind 20790 points

Jens,

I have got some more details and reference code for how and where to modify the code. In general, the PHY can be initialized either in GEL or in Code. For example in the PDK EMAC examples, Init_Cpsw() calls Init_MDIO(), the latter is an empty function because 6657/6678EVM doesn’t need to initialize PHY. On your cases, you can do PHY init there.

Here, attached the example for using MDIO to access PHY:

Gel file for K2E EVM, at the bottom, there is setupPhy()
C file for C6474 device

3463.evmtci6630k2e_V1.1.gel

4237.phyconfig.c

/*  ============================================================================
 *   Copyright (c) Texas Instruments Inc 2002, 2003, 2004, 2005, 2011
 *
 *   Use of this software is controlled by the terms and conditions found in the
 *   license agreement under which this software has been supplied.
 *   ===========================================================================
 */

/** ============================================================================
 * FILE NAME: phyconfig.c
 *
 * DESCRIPTION: Initialize PHY 
 *
*/

/* Header file */
#include <tistdtypes.h>
#include <stdio.h>


#define MDIO_BASE               0x02c81800
#define MDIO_CONTROL            *(volatile Uint32*)(MDIO_BASE + 0x04)
#define MDIO_USERACCESS0        *(volatile Uint32*)(MDIO_BASE + 0x80)


void phySetReg(Uint32 phynum, Uint32 regnum, Uint16 data)
{
	Uint32 temp;

    temp = 0                    // Read Phy Id 1
        | (1 << 31)             // [31] Go
        | (1 << 30)             // [30] Write
        | (0 << 29)             // [29] Ack
        | (regnum << 21)        // [25-21] PHY register address
        | (phynum << 16)        // [20-16] PHY address
        | (data << 0)           // [15-0] Data
        ;

    MDIO_USERACCESS0= temp;
	while(MDIO_USERACCESS0 & 0x80000000); // Wait for Results
}


void phyInit()
{
    /* ---------------------------------------------------------------- *
     *                                                                  *
     *  Init PHY / MDIO                                                 *
     *                                                                  *
     * ---------------------------------------------------------------- */
    MDIO_CONTROL = 0x4000001f;              // Enable MII interface

    /* Turn PPU off to make copper PHY visible at SMI address 0x01 */
	phySetReg(27, 4, 0x0081);

	/* Configure Marvell 88E6122 PHY */
    phySetReg(0xe, 26, 0x47);        // Set PHY port 6 SERDES to 0.7V swing
    phySetReg(0xd, 26, 0x47);        // Set PHY port 5 SERDES to 0.7V swing
	phySetReg(0x0e, 0, 0x8140);      // Configure PHY port 6 SERDES --> Faraday 1 at 1000mpbs, full duplex
	phySetReg(0x0d, 0, 0x8140);      // Configure PHY port 5 SERDES --> Faraday 2 at 1000mbps, full duplex
    phySetReg(0x15, 0x1, 0x043e);    // Force internal switch --> port 5 SERDES to 1000MPBS, full Duplex
    phySetReg(0x16, 0x1, 0x043e);    // Force internal switch --> port 6 SERDES to 1000MBPS, full Duplex

	/* Force 1000mps at copper PHY, disable auto-negotiate */
	//phySetReg(1, 0, 0x8140);       // 0x8140 = 1000mbps

	/* Force 100mps at copper PHY, disable auto-negotiate */
	phySetReg(1, 0, 0xa100);         // 0xa100 = 100mbps
}

void phySetup(void)
{
	Uint32 i;
	while(MDIO_USERACCESS0 & 0x80000000); // Wait for Results
	phyInit();
	printf("PHY started\n");

	for(i = 0; i < 0x20000000; i++) asm("NOP");
	printf("Waited 4 seconds.\n");
}

0 Pubesh over 9 years ago in reply to Pubesh

TI__Mastermind 20790 points

Jens,

Is that reference code and suggestion useful on your side? Did you start the modification for your PHY reference with the attached file? If possible share your code for PHY config, this will be useful for the future readers to refer the similar issue thread.

0 Jens Biltoft over 9 years ago in reply to Pubesh

Expert 1220 points

Hi Pubesh

I managed to get communicttion with the PHY via the MDIO interface to work, so now I am able to read all the configuration registers and to modify them as well.

I have put my code in the EMACLoopback_TestProject but I am not sure jow the PHY should be configured for the Loopback test to succeed.

The default mode is RGMII (System mode) to Auto Media Detect Copper/1000BASE_X/100BASE-FX

But that does not seem to work

I have tried configuring it to two other modes but none of them works

SGMII (System mode) to Copper
RGMII (System mode) to Auto Media Detect Copper/SGMII (Media mode)

But to be honest I do not know what the different modes means, or what would be the correct mode, to get my custom board to behave in the same way as the EVM.

Can you tell me how the PHY on the EVM is configured - then maybe I will be able to configure the PHY on my board in the same way.

When I run the EMACLoopback_TestProject on my custom board it seems that when the function app_timer calls

if (emac_poll(port_num, &link_info) == EMAC_DRV_RESULT_OK) then it evaluates it to false. because emac_poll returns EMAC_DRV_RESULT_POLL_ERR (-9)

I am not able to step into emac_poll so I do not know what this function does, maybe you can tell me?

thanks

Jens

0 Pubesh over 9 years ago in reply to Jens Biltoft

TI__Mastermind 20790 points

Jens,

If possible share your PHY configuration code as well PHY datasheet. I do not have your similar setup my side to test, but I can try to give technical suggestion for PHY configuration.

0 Jens Biltoft over 9 years ago in reply to Pubesh

Expert 1220 points

Sorry, but the datasheet for the PHY is confidential and under an NDA.

The only configuration I have done is to try different PHY modes. according to this picture

Other than that it is just the EMACLoopback_testproject from the pdk_C6657_1_1_2_6 that I am using.

I have tried with and without the EVM-GEL file, and I have also tried with platform initialization in code.

I have attatched my current test-project for reference.5635.EMACLoopback_testProject.zip

To change the PHY mode I have changed phyInit to

#define SET_PHYPAGE(X) writePhyReg(0, 22, X)
/******************************************************************************
*
* Function:	phyInit
*
* Description:	Initialize the phy in loopback mode
*
* Parameters:	uiLoopback - 0 - Phy loopback on port 6
* 						   - 1 - RJ45 loopback enable port 1
*						   - 2 - SGMII loopback on AMC edge
* Return Value: void
******************************************************************************/
void phyInit(Uint32 uiLoopback)
{
  int regval;

    // Enable MDIO interface
    MDIOR->CONTROL = 0x400000A5;

//    SET_PHYPAGE(0) ;
//    regval = readPhyReg(0, 0);
//    writePhyReg(0, 0, (regval | (1<<14))); /* enable PHY loopback */

    SET_PHYPAGE(18); /* set phy page to 18 */
    regval = readPhyReg(0, 20);
    writePhyReg(0, 20, regval | 0x8001);  /* set mode to 1 and request SW reset of PHY*/



}

To readout all the registers in the PHY I have done this

    int page = 0;
    int regnum = 0;
    int regvalue = 0;

    for (page = 0; page <= 18; page++)
{
  writePhyReg(0, 22, page);
  for(regnum = 0; regnum <= 28; regnum++)
  {
    regvalue = readPhyReg(0, regnum);
    if (regvalue)
      System_printf("\nreadPhyReg page %d, regnum %d = 0x%x", page, regnum, regvalue);
  }
}

Which will read all registers in PHY and print the ones that are non-zero, and result is this print-out

[C66xx_0] TMS320C6657: EMAC Driver Revision: 01.00.03.00
EMAC loopback test application initialization

readPhyReg page 0, regnum 0 = 0x1140
readPhyReg page 0, regnum 1 = 0x796d
readPhyReg page 0, regnum 2 = 0x141
readPhyReg page 0, regnum 3 = 0xdd1
readPhyReg page 0, regnum 4 = 0x1e1
readPhyReg page 0, regnum 5 = 0xcde1
readPhyReg page 0, regnum 6 = 0xf
readPhyReg page 0, regnum 7 = 0x2001
readPhyReg page 0, regnum 8 = 0x4006
readPhyReg page 0, regnum 9 = 0x300
readPhyReg page 0, regnum 10 = 0x3800
readPhyReg page 0, regnum 13 = 0x3
readPhyReg page 0, regnum 15 = 0x3000
readPhyReg page 0, regnum 16 = 0x3060
readPhyReg page 0, regnum 17 = 0xbc08
readPhyReg page 0, regnum 19 = 0x1c40
readPhyReg page 0, regnum 20 = 0x20
readPhyReg page 0, regnum 26 = 0x40
readPhyReg page 1, regnum 0 = 0x1140
readPhyReg page 1, regnum 1 = 0x149
readPhyReg page 1, regnum 2 = 0x141
readPhyReg page 1, regnum 3 = 0xdd1
readPhyReg page 1, regnum 4 = 0x60
readPhyReg page 1, regnum 6 = 0x4
readPhyReg page 1, regnum 7 = 0x2001
readPhyReg page 1, regnum 13 = 0x3
readPhyReg page 1, regnum 15 = 0xc000
readPhyReg page 1, regnum 16 = 0x420d
readPhyReg page 1, regnum 17 = 0x8000
readPhyReg page 1, regnum 19 = 0x10
readPhyReg page 1, regnum 22 = 0x1
readPhyReg page 1, regnum 26 = 0x42
readPhyReg page 2, regnum 13 = 0x3
readPhyReg page 2, regnum 16 = 0x4448
readPhyReg page 2, regnum 21 = 0x1076
readPhyReg page 2, regnum 22 = 0x2
readPhyReg page 2, regnum 24 = 0x5605
readPhyReg page 2, regnum 25 = 0x13
readPhyReg page 3, regnum 13 = 0x3
readPhyReg page 3, regnum 16 = 0x101e
readPhyReg page 3, regnum 17 = 0x4400
readPhyReg page 3, regnum 18 = 0x4905
readPhyReg page 3, regnum 19 = 0x73
readPhyReg page 3, regnum 22 = 0x3
readPhyReg page 4, regnum 13 = 0x3
readPhyReg page 4, regnum 16 = 0x2000
readPhyReg page 4, regnum 22 = 0x4
readPhyReg page 5, regnum 13 = 0x3
readPhyReg page 5, regnum 21 = 0x1040
readPhyReg page 5, regnum 22 = 0x5
readPhyReg page 5, regnum 23 = 0x603
readPhyReg page 5, regnum 25 = 0x104
readPhyReg page 5, regnum 26 = 0xf12
readPhyReg page 5, regnum 27 = 0xa0c
readPhyReg page 5, regnum 28 = 0xc06
readPhyReg page 6, regnum 13 = 0x3
readPhyReg page 6, regnum 19 = 0xb
readPhyReg page 6, regnum 20 = 0x200
readPhyReg page 6, regnum 22 = 0x6
readPhyReg page 6, regnum 26 = 0x190a
readPhyReg page 6, regnum 27 = 0xc35
readPhyReg page 7, regnum 13 = 0x3
readPhyReg page 7, regnum 22 = 0x7
readPhyReg page 7, regnum 25 = 0x104
readPhyReg page 7, regnum 26 = 0xf12
readPhyReg page 7, regnum 27 = 0xa0c
readPhyReg page 7, regnum 28 = 0x6
readPhyReg page 8, regnum 0 = 0x1000
readPhyReg page 8, regnum 1 = 0x20c
readPhyReg page 8, regnum 3 = 0x80
readPhyReg page 8, regnum 22 = 0x8
readPhyReg page 9, regnum 22 = 0x9
readPhyReg page 10, regnum 22 = 0xa
readPhyReg page 11, regnum 22 = 0xb
readPhyReg page 12, regnum 1 = 0x1f40
readPhyReg page 12, regnum 5 = 0xf000
readPhyReg page 12, regnum 6 = 0xf186
readPhyReg page 12, regnum 7 = 0x1388
readPhyReg page 12, regnum 22 = 0xc
readPhyReg page 13, regnum 22 = 0xd
readPhyReg page 14, regnum 3 = 0x1
readPhyReg page 14, regnum 22 = 0xe
readPhyReg page 15, regnum 22 = 0xf
readPhyReg page 16, regnum 22 = 0x10
readPhyReg page 17, regnum 1 = 0x1
readPhyReg page 17, regnum 5 = 0x8000
readPhyReg page 17, regnum 14 = 0x1
readPhyReg page 17, regnum 18 = 0x3fff
readPhyReg page 17, regnum 19 = 0x3fff
readPhyReg page 17, regnum 20 = 0x3fff
readPhyReg page 17, regnum 21 = 0x3fff
readPhyReg page 17, regnum 22 = 0x11
readPhyReg page 18, regnum 0 = 0xc00
readPhyReg page 18, regnum 1 = 0x111e
readPhyReg page 18, regnum 2 = 0x111e
readPhyReg page 18, regnum 3 = 0x60
readPhyReg page 18, regnum 19 = 0xb
readPhyReg page 18, regnum 20 = 0x7
readPhyReg page 18, regnum 22 = 0x12
readPhyReg page 18, regnum 25 = 0x1
readPhyReg page 18, regnum 27 = 0x2000

emac_init: core 0, port 0, total number of channels/MAC addresses: 8/32
MAC addresses configured for channel 0:
00-01-02-03-04-05
00-01-02-03-04-15
00-01-02-03-04-25
00-01-02-03-04-35
MAC addresses configured for channel 1:
00-01-02-03-14-05
00-01-02-03-14-15
00-01-02-03-14-25
00-01-02-03-14-35
MAC addresses configured for channel 2:
00-01-02-03-24-05
00-01-02-03-24-15
00-01-02-03-24-25
00-01-02-03-24-35
MAC addresses configured for channel 3:
00-01-02-03-34-05
00-01-02-03-34-15
00-01-02-03-34-25
00-01-02-03-34-35
MAC addresses configured for channel 4:
00-01-02-03-44-05
00-01-02-03-44-15
00-01-02-03-44-25
00-01-02-03-44-35
MAC addresses configured for channel 5:
00-01-02-03-54-05
00-01-02-03-54-15
00-01-02-03-54-25
00-01-02-03-54-35
MAC addresses configured for channel 6:
00-01-02-03-64-05
00-01-02-03-64-15
00-01-02-03-64-25
00-01-02-03-64-35
MAC addresses configured for channel 7:
00-01-02-03-74-05
00-01-02-03-74-15
00-01-02-03-74-25
00-01-02-03-74-35
emac_open core 0 port 0 successfully

Then after a while I get

Loopback Test failed on core 0
Packets TX/RX on port 0:
Channel 0 TX pkts 0, RX pkts 0
Channel 1 TX pkts 0, RX pkts 0
Channel 2 TX pkts 0, RX pkts 0
Channel 3 TX pkts 0, RX pkts 0
Channel 4 TX pkts 0, RX pkts 0
Channel 5 TX pkts 0, RX pkts 0
Channel 6 TX pkts 0, RX pkts 0
Channel 7 TX pkts 0, RX pkts 0

Jens

Best

Jens

0 Jens Biltoft over 9 years ago in reply to Jens Biltoft

Expert 1220 points

I have made a bit more progress on the PHY configuration.

in the EMACLoopback_testproject I change the file test_loc.h to set the right PHY adress

On our board we have configured the PHY to have adress 0 so I change the define in test_loc.h to

/**
 * @brief   EMAC port 0 phy address
 */
#define     APP_PORT0_PHY_ADDR                  0 /*was 24 */

/**
 * @brief   EMAC port 1 phy address
 */
#define     APP_PORT1_PHY_ADDR                  1 /*was 25 */

After doing this, the loopback test program begins to send and recieve packages.

I still struggle with packets beeing lost or corrupted, but that may be due to issues in the Hardware.

Jens

0 Pubesh over 9 years ago in reply to Jens Biltoft

TI__Mastermind 20790 points

Jens,

Thanks for sharing your configuration and test result. Glad to hear about your working progress with PHY config.

Once you completed this PHY configuration, you can share so that someone get for the best help, if you want to share this software code.

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

As you know i am also having the same problem. what exactly you changed in the TI loop_back test to work with the PHY88E1512.

Thanks,

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

I only changed the PHY0 address as I wrote in my previous post. After that I just worked - not that I can tell you why, I guess it is some kind of magic or woodo :-).

Have you connected the config pin to GND on you HW, I believe that this is what configures the Address?

Best

Jens

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

Please explain me little bit more about Config pin to GND.which config pin?

Thanks,

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

There is not that much to say. On the PHY pin 15 is called config and we have connected this pin to GND to set the adress of the PHY to 0.

Do you have the data sheet for the PHY?

Jens

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

Ya i have the data sheet.

Ram.

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

we connected now the Config pin 15 to GND, but EMAC Loop back test still not successful. have you also tested with other test projects like Client and helloworld?

i am giving the result window of loop back test. may be you can see why it is not working from my side.

[C66xx_0] TMS320C6657: EMAC Driver Revision: 01.00.03.00
EMAC loopback test application initialization
emac_init: core 0, port 0, total number of channels/MAC addresses: 8/32
MAC addresses configured for channel 0:
00-01-02-03-04-05
00-01-02-03-04-15
00-01-02-03-04-25
00-01-02-03-04-35
MAC addresses configured for channel 1:
00-01-02-03-14-05
00-01-02-03-14-15
00-01-02-03-14-25
00-01-02-03-14-35
MAC addresses configured for channel 2:
00-01-02-03-24-05
00-01-02-03-24-15
00-01-02-03-24-25
00-01-02-03-24-35
MAC addresses configured for channel 3:
00-01-02-03-34-05
00-01-02-03-34-15
00-01-02-03-34-25
00-01-02-03-34-35
MAC addresses configured for channel 4:
00-01-02-03-44-05
00-01-02-03-44-15
00-01-02-03-44-25
00-01-02-03-44-35
MAC addresses configured for channel 5:
00-01-02-03-54-05
00-01-02-03-54-15
00-01-02-03-54-25
00-01-02-03-54-35
MAC addresses configured for channel 6:
00-01-02-03-64-05
00-01-02-03-64-15
00-01-02-03-64-25
00-01-02-03-64-35
MAC addresses configured for channel 7:
00-01-02-03-74-05
00-01-02-03-74-15
00-01-02-03-74-25
00-01-02-03-74-35
emac_open core 0 port 0 successfully
Loopback Test failed on core 0
Packets TX/RX on port 0:
Channel 0 TX pkts 0, RX pkts 0
Channel 1 TX pkts 0, RX pkts 0
Channel 2 TX pkts 0, RX pkts 0
Channel 3 TX pkts 0, RX pkts 0
Channel 4 TX pkts 0, RX pkts 0
Channel 5 TX pkts 0, RX pkts 0
Channel 6 TX pkts 0, RX pkts 0
Channel 7 TX pkts 0, RX pkts 0

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

I cant say anything from your dump. But I remeber one thing that differs the new PHY from the one on the EVM

This PHY has a reset pin that must be pulled high for the PHY to work, did you remember to set this pin high?

Best

Jens

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi,

I see the RESET pin is PIN30 on my PHY. how i do reset this pin. From the hardware or software?if from software how?

Thanks,

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

On my HW design the RESET pin is connected to a GPIO on the DSP that I can set high after reset.

On your HW design - well that is a bit hard for me to know :-)

I think you need to look at your HW design to see how the RESET pin is connected, if it is not connected you shoul pull it high, and tell your HW-design department that you need to be able to do it from the DSP :-)

Goo luck

Jens

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

Please provide me the EMAC_loop back project which is worked for you.

Thanks,

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

Here are the files from my EMAC_Loopback test project, hope you find it usefull

Jens

1488.EMACLoopback_testProject.zip

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

The reset pin is connected with GPIO17. in my case, i took your project and changed the EVM_init() as my clocks are different for ddr2 as well as core PLL . The input clocks in my case are for DDR3, Core DSP and EthernetPHY is same of 312.5MHz.and pull up the reset with GPIO17. still not working. what is the input clock in your case for the Ethernet PHY?

do i have to change any PLL Valuese(like PLL Multiplication factor) for PHY? have you already tested the client project with the same setup(which is already worked with Loopback Test)?

Thanks,

Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

I do not know if you have to change more, I only know that I have not changed anything to make it run on my board.

The board we have made is based as much as possible on the EVM board, so we use the same clock frequencies as the EVM for core, DDR3 etc.

We use a 25MHz clock for the PHY

I have not tried the client_project yet, but that is the next step for me, I will let you know if it works. I will not have the time to work on this the nex couple of weeks so please be patient.

Jens

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

It has been a while, did you manage to get your PHY up and running?

I have now managed to make the PHY work and have a working board :-)

I have attached a c file that may help you in configuring the PHY.

phy_if.c

#include "phy_if.h"

#define CSL_MDIO_0_REGS                 (0x02c08000 + 0x0800)

#define MDIOR   ((CSL_MdioRegs *) CSL_MDIO_0_REGS)

enum APP_ETHERNET_MODES_E
{
    PHY_LOOPBACK            = 0,
    COPPER_LOOPBACK,
    AMC_MODE,
    NORMAL_PHY_MODE
};

#define APP_PORT0_PHY_ADDR 1

/******************************************************************************
 *
 * Function:	readPhyReg
 *
 * Description:	Reads the phy register.
 *
 * Parameters:	Uint32 phynum - Address of the phy
 *              Uint32 regnum - Phy register number
 *
 * Return Value: Uint16 - Register value read
 ******************************************************************************/
Uint16 readPhyReg(Uint32 phynum, Uint32 regnum)
{
  Uint16 value;

  MDIOR->USERACCESS0 = 0                  // Read Phy Id 1
      | ( 1 << 31 )                       // [31] Go
      | ( 0 << 30 )                       // [30] Read
      | ( 0 << 29 )                       // [29] Ack
      | (regnum << 21 )                   // [25-21] PHY register address
      | (phynum << 16 )                   // [20-16] PHY address
      | ( 0 << 0 )                        // [15-0] Data
      ;

  while ( MDIOR->USERACCESS0 & 0x80000000 ); // Wait for Results

  value = MDIOR->USERACCESS0;

  return value;
}

/******************************************************************************
 *
 * Function:	writePhyReg
 *
 * Description:	Writes to the phy register.
 *
 * Parameters:	Uint32 phynum - Address of the phy
 *              Uint32 regnum - Phy register number
 *              Uint16 data   - Data to be written to register
 *
 * Return Value: void
 ******************************************************************************/
void writePhyReg(Uint32 phynum, Uint32 regnum, Uint16 data)
{
  MDIOR->USERACCESS0 = 0                  // Read Phy Id 1
      | ( 1 << 31 )                       // [31] Go
      | ( 1 << 30 )                       // [30] Write
      | ( 0 << 29 )                       // [29] Ack
      | (regnum << 21 )                   // [25-21] PHY register address
      | (phynum << 16 )                   // [20-16] PHY address
      | ( data << 0 );                    // [15-0] Data

  while ( MDIOR->USERACCESS0 & 0x80000000 ); // Wait for Results
}

#define SET_PHYPAGE(X) writePhyReg(APP_PORT0_PHY_ADDR, 22, X)

/******************************************************************************
 *
 * Function:	phyInit
 *
 * Description:	Initialize the phy in loopback mode
 *
 * Parameters:	uiLoopback - 0 - Phy loopback on port 6
 * 						   - 1 - RJ45 loopback enable port 1
 *						   - 2 - SGMII loopback on AMC edge
 * Return Value: void
 ******************************************************************************/
void phyReset(void)
{
  int regval;
  int page;
#ifdef EVM_BOARD
  return;
#endif
  page = readPhyReg(APP_PORT0_PHY_ADDR, 22);
  //SET_PHYPAGE(0); /* set phy page to 0 */
  //regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
  //writePhyReg(APP_PORT0_PHY_ADDR, 0, regval | (1<<9));  /* restart copper negotiation*/

  SET_PHYPAGE(18); /* set phy page to 18 */
  regval = readPhyReg(APP_PORT0_PHY_ADDR, 20);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, regval | 0x8001);  /* set mode to 1 and request SW reset of PHY*/
  SET_PHYPAGE(page);

}

/******************************************************************************
 *
 * Function:	phyInit
 *
 * Description:	Initialize the phy in loopback mode
 *
 * Parameters:	uiLoopback - 0 - Phy loopback on port 6
 * 						   - 1 - RJ45 loopback enable port 1
 *						   - 2 - SGMII loopback on AMC edge
 * Return Value: void
 ******************************************************************************/
void phyInit(Uint32 uiLoopback)
{
  int regval;
//  int page;
  // Enable MDIO interface
#ifdef EVM_BOARD
  return;
#endif
  MDIOR->CONTROL = 0x400000A5;

  SET_PHYPAGE(0x00ff);	/* reg page 0xff */
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0x214B);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2144);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0x0C28);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2146);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0xB233);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x214D);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0xCC0C);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2159);
  SET_PHYPAGE(0);

//  SET_PHYPAGE(1);
//  writePhyReg(APP_PORT0_PHY_ADDR, 26, 0x47);  /* Ste PHY SWING to max, allowed to bypass serial AN, must be followed by reset*/
//  regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
//  regval |= ((1 << 15) | (1<<9)); /* reset and restart Auto Negotiation SGMII*/
//  writePhyReg(APP_PORT0_PHY_ADDR, 0, regval);

//  SET_PHYPAGE(2);
//  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x5449);  /* Ste PHY SWING to max, not allowed to bypass serial AN, must be followed by reset*/

//  SET_PHYPAGE(0);
  writePhyReg(APP_PORT0_PHY_ADDR, 9, 0x1800);  /* Set PHY to MASTER */
//  writePhyReg(APP_PORT0_PHY_ADDR, 9, 0x1000);  /* Set PHY to SLAVE do not advertise 1000BASE*/

  SET_PHYPAGE(18);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x8001);  /* set mode to 1 and request SW reset of PHY*/
 // SET_PHYPAGE(6);
 // writePhyReg(APP_PORT0_PHY_ADDR, 18, 0x08);  /* Enable external loopback of PHY*/

  // SET_PHYPAGE(6);
  // writePhyReg(APP_PORT0_PHY_ADDR, 18, 0x08);  /* Enable external loopback of PHY*/

  SET_PHYPAGE(18);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x1);  /* set mode to 1 and request SW reset of PHY*/
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x8201);  /* set mode to 1 and request SW reset of PHY*/

//  regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
//  regval |= ((1 << 15)); /* reset and restart Auto Negotiation copper*/
//  writePhyReg(APP_PORT0_PHY_ADDR, 0, regval);

  SET_PHYPAGE(0);
  do
  {
    regval = readPhyReg(APP_PORT0_PHY_ADDR, 1);
  }
  while ((regval >> 5) & 0x1 == 0);

}


/**
 *  @b Description
 *  @n
 *      Utility function that is required by the IPC module to set the proc Id.
 *      The proc Id is set via this function instead of hard coding it in the .cfg file
 *
 *  @retval
 *      Not Applicable.
 */
void emac_test_phy_init (void)
{
  phyInit(NORMAL_PHY_MODE);
}


#include <ti/csl/csl_mdio.h>
#include <ti/csl/csl_sgmii.h>

#define CSL_MDIO_0_REGS                 (0x02c08000 + 0x0800)

#define MDIOR   ((CSL_MdioRegs *) CSL_MDIO_0_REGS)

enum APP_ETHERNET_MODES_E
{
    PHY_LOOPBACK            = 0,
    COPPER_LOOPBACK,
    AMC_MODE,
    NORMAL_PHY_MODE
};

#define APP_PORT0_PHY_ADDR 1

/******************************************************************************
 *
 * Function:	readPhyReg
 *
 * Description:	Reads the phy register.
 *
 * Parameters:	Uint32 phynum - Address of the phy
 *              Uint32 regnum - Phy register number
 *
 * Return Value: Uint16 - Register value read
 ******************************************************************************/
Uint16 readPhyReg(Uint32 phynum, Uint32 regnum)
{
  Uint16 value;

  MDIOR->USERACCESS0 = 0                  // Read Phy Id 1
      | ( 1 << 31 )                       // [31] Go
      | ( 0 << 30 )                       // [30] Read
      | ( 0 << 29 )                       // [29] Ack
      | (regnum << 21 )                   // [25-21] PHY register address
      | (phynum << 16 )                   // [20-16] PHY address
      | ( 0 << 0 )                        // [15-0] Data
      ;

  while ( MDIOR->USERACCESS0 & 0x80000000 ); // Wait for Results

  value = MDIOR->USERACCESS0;

  return value;
}

/******************************************************************************
 *
 * Function:	writePhyReg
 *
 * Description:	Writes to the phy register.
 *
 * Parameters:	Uint32 phynum - Address of the phy
 *              Uint32 regnum - Phy register number
 *              Uint16 data   - Data to be written to register
 *
 * Return Value: void
 ******************************************************************************/
void writePhyReg(Uint32 phynum, Uint32 regnum, Uint16 data)
{
  MDIOR->USERACCESS0 = 0                  // Read Phy Id 1
      | ( 1 << 31 )                       // [31] Go
      | ( 1 << 30 )                       // [30] Write
      | ( 0 << 29 )                       // [29] Ack
      | (regnum << 21 )                   // [25-21] PHY register address
      | (phynum << 16 )                   // [20-16] PHY address
      | ( data << 0 );                    // [15-0] Data

  while ( MDIOR->USERACCESS0 & 0x80000000 ); // Wait for Results
}

#define SET_PHYPAGE(X) writePhyReg(APP_PORT0_PHY_ADDR, 22, X)

/******************************************************************************
 *
 * Function:	phyInit
 *
 * Description:	Initialize the phy in loopback mode
 *
 * Parameters:	uiLoopback - 0 - Phy loopback on port 6
 * 						   - 1 - RJ45 loopback enable port 1
 *						   - 2 - SGMII loopback on AMC edge
 * Return Value: void
 ******************************************************************************/
void phyReset(void)
{
  int regval;
  int page;
#ifdef EVM_BOARD
  return;
#endif
  page = readPhyReg(APP_PORT0_PHY_ADDR, 22);
  //SET_PHYPAGE(0); /* set phy page to 0 */
  //regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
  //writePhyReg(APP_PORT0_PHY_ADDR, 0, regval | (1<<9));  /* restart copper negotiation*/

  SET_PHYPAGE(18); /* set phy page to 18 */
  regval = readPhyReg(APP_PORT0_PHY_ADDR, 20);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, regval | 0x8001);  /* set mode to 1 and request SW reset of PHY*/
  SET_PHYPAGE(page);

}

/******************************************************************************
 *
 * Function:	phyInit
 *
 * Description:	Initialize the phy in loopback mode
 *
 * Parameters:	uiLoopback - 0 - Phy loopback on port 6
 * 						   - 1 - RJ45 loopback enable port 1
 *						   - 2 - SGMII loopback on AMC edge
 * Return Value: void
 ******************************************************************************/
void phyInit(Uint32 uiLoopback)
{
  int regval;
//  int page;
  // Enable MDIO interface
#ifdef EVM_BOARD
  return;
#endif
  MDIOR->CONTROL = 0x400000A5;

  SET_PHYPAGE(0x00ff);	/* reg page 0xff */
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0x214B);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2144);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0x0C28);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2146);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0xB233);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x214D);
  writePhyReg(APP_PORT0_PHY_ADDR, 17, 0xCC0C);
  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x2159);
  SET_PHYPAGE(0);

//  SET_PHYPAGE(1);
//  writePhyReg(APP_PORT0_PHY_ADDR, 26, 0x47);  /* Ste PHY SWING to max, allowed to bypass serial AN, must be followed by reset*/
//  regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
//  regval |= ((1 << 15) | (1<<9)); /* reset and restart Auto Negotiation SGMII*/
//  writePhyReg(APP_PORT0_PHY_ADDR, 0, regval);

//  SET_PHYPAGE(2);
//  writePhyReg(APP_PORT0_PHY_ADDR, 16, 0x5449);  /* Ste PHY SWING to max, not allowed to bypass serial AN, must be followed by reset*/

//  SET_PHYPAGE(0);
  writePhyReg(APP_PORT0_PHY_ADDR, 9, 0x1800);  /* Set PHY to MASTER */
//  writePhyReg(APP_PORT0_PHY_ADDR, 9, 0x1000);  /* Set PHY to SLAVE do not advertise 1000BASE*/

  SET_PHYPAGE(18);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x8001);  /* set mode to 1 and request SW reset of PHY*/
 // SET_PHYPAGE(6);
 // writePhyReg(APP_PORT0_PHY_ADDR, 18, 0x08);  /* Enable external loopback of PHY*/

  // SET_PHYPAGE(6);
  // writePhyReg(APP_PORT0_PHY_ADDR, 18, 0x08);  /* Enable external loopback of PHY*/

  SET_PHYPAGE(18);
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x1);  /* set mode to 1 and request SW reset of PHY*/
  writePhyReg(APP_PORT0_PHY_ADDR, 20, 0x8201);  /* set mode to 1 and request SW reset of PHY*/

//  regval = readPhyReg(APP_PORT0_PHY_ADDR, 0);
//  regval |= ((1 << 15)); /* reset and restart Auto Negotiation copper*/
//  writePhyReg(APP_PORT0_PHY_ADDR, 0, regval);

  SET_PHYPAGE(0);
  do
  {
    regval = readPhyReg(APP_PORT0_PHY_ADDR, 1);
  }
  while ((regval >> 5) & 0x1 == 0);

}


/**
 *  @b Description
 *  @n
 *      Utility function that is required by the IPC module to set the proc Id.
 *      The proc Id is set via this function instead of hard coding it in the .cfg file
 *
 *  @retval
 *      Not Applicable.
 */
void emac_test_phy_init (void)
{
  phyInit(NORMAL_PHY_MODE);
}

hope you find it usefull

Best

Jens

0 Ramana_Munich over 9 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

Congrats. you finally made it. we want to test now, upto now we tested the emac_loopback_test , putting the emac in the loop.
now we want to send some data packets to our board and receive it.

please give me your test project, i use this to test here with my board. how you tested? connecting the PC with your board? or connecting two boards (one is sending and other one is receiving)?

Thanks,
Ram.

0 Jens Biltoft over 9 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

I do not have an example application that I can send you, but I can tell you what I have done, and share some of the code with you.

I started out with the client example application, and made only a few modifications to this.

the client.c looks like this

#include <stdio.h>
#include <ti/ndk/inc/netmain.h>

#include "client.h"
#include "phy_if.h"

/* BIOS6 include */
#include <ti/sysbios/BIOS.h>

/* Platform utilities include */
#include <ti/platform/platform.h>

void cbServiceReport( void);
void hookThreadBegin(void);
void hookThreadInit(void);
void hookThreadDelete(void);
void hookStatusReport(uint Item, uint Status, uint Report, HANDLE h);
void hookNetworkOpen(void);
void hookNetworkClose(void);
void hookNetworkIP(void);

char *VerStr = "\nTCP/IP Stack Example Client\n";

//---------------------------------------------------------------------
// Main Entry Point
//---------------------------------------------------------------------
int init_client()
{
return(0);
}

void cbServiceReport( void)
{
printf("cbServiceReport\n");
}

void hookThreadBegin(void)
{
semaphore = OS_SemCreate(0);
printf("void hookThreadBegin \n");
}

void hookThreadInit(void)
{
TaskSleep(2000); /* this gives the phy time to initialize */
printf("void hookThreadInit \n ");
}
void hookThreadDelete(void)
{
printf("void hookThreadDelete\n");
}
void hookStatusReport(uint Item, uint Status, uint Report, HANDLE h)
{
printf("void hookStatusReport\n");
}
void hookNetworkOpen(void)
{
AddWebFiles();
printf("void hookNetworkOpen \n");
}
void hookNetworkClose(void)
{
printf("void hookNetworkClose\n");
}
void hookNetworkIP(void)
{
printf("void hookNetworkIP \n");
}

The .cfg file looks like this
/* Enable BIOS Task Scheduler */
BIOS.taskEnabled = true;

Exception.common$.logger = LoggerBuf.create();
Exception.enablePrint = true; /* prints exception details to the CCS console */
var Emac = xdc.useModule('ti.ndk.config.Emac');
var Ip = xdc.useModule('ti.ndk.config.Ip');
var EmacLLD = xdc.loadPackage('ti.drv.emac');
var Tcp = xdc.useModule('ti.ndk.config.Tcp');
var Telnet = xdc.useModule('ti.ndk.config.Telnet');
var Http = xdc.useModule('ti.ndk.config.Http');
var NdkTransport = xdc.loadPackage('ti.transport.ndk');
var Global = xdc.useModule('ti.ndk.config.Global');
var Udp = xdc.useModule('ti.ndk.config.Udp');

Global.enableCodeGeneration = true;

Ip.autoIp = true;

var telnet0Params = new Telnet.Params();
telnet0Params.callBackFxn = "&MyConsoleOpen";
telnet0Params.ResolveIP = false;
telnet0Params.mode = 0;
telnet0Params.CallByIP = false;
var telnet0 = Telnet.create(telnet0Params);

Global.stackBeginHook = "&hookThreadBegin";
Global.stackInitHook = "&hookThreadInit";
Global.stackDeleteHook = "&hookThreadDelete";
Global.serviceReportHook = "&hookStatusReport";
Global.networkOpenHook = "&hookNetworkOpen";
Global.networkCloseHook = "&hookNetworkClose";
Global.networkIPAddrHook = "&hookNetworkIP";
var http0Params = new Http.Params();
var http0 = Http.create(http0Params);

My main looks something like this
main()
{
GpioInit() /* setup Gpio - release the PHY reset */
emac_test_phy_init();
BIOS_start();
}

Be sure you have the correct value for APP_PORT0_PHY_ADDR (defined in phy_if.h) It must match you HW configuration.

On my board the PHY is configured to have address 1, but you must verify which address you are using (it can be either 0 or 1)

At the moment I connect to the DSP from my PC through a router. If you want to connect a PC directly to the DSP you will need to use a twisted twisted-pair cable, and I guess that also goes if you need to connect to DSP's directly.

My next step is to open a telnet connection from one DSP board to another, but at the moment I do not know how to do that.

best
Jens

0 Ramana_Munich over 8 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

i changed my client project like you. but i am getting like this and it does not go further.
[C66xx_0] void hookThreadBegin
void hookThreadInit
emac_init: core 0, port 0, total number of channels/MAC addresses: 1/1
MAC addresses configured for channel 0:
00-17-EA-F1-52-D7
SGMII reset successful........
SGMII config successful........

i have some questions?
(1)GpioInit() /* setup Gpio - release the PHY reset */ is it compulsory to do?
(2)you set phyInit(PHY-NormalMode) it says like this,uiLoopback - 0 - Phy loopback on port 6
* - 1 - RJ45 loopback enable port 1
* - 2 - SGMII loopback on AMC edge
what is mode 3(Normal Phy mode) then?

(3)SGMII reset successful these messages are coming from emac_drv. c file, now we are taking NdkTransport = xdc.loadPackage('ti.transport.ndk'); so its including nimu driver. have you changed some nimu driver code and rebuild it and created the new package. if i want to debug emac_drv.c file if i include directly in theclient project,it works?
i see that emac_drv.c ,the code looks like this . i am using c6657. please see it is it similar like your code?

#if defined(C6457) || defined(C6474) || defined(C6657)
if ((!p_config->loop_back) && EMAC_MASTER_CORE(port_num))
{
i = SGMII_reset();

if ( i == 0 )
emac_debug_print(("SGMII reset successful........\n"));
else
{
emac_debug_print(("SGMII reset NOT successful........\n"));
}
#ifndef C6657
/* set sgmii lock mode*/
*(volatile Uint32 *)(CSL_ECTL_0_REGS + 0x88) = 1;
#endif

#ifdef C6657
SgmiiCfg.masterEn = 0x0; /* Disable SGMII Master */
#else
SgmiiCfg.masterEn = 0x1; /* Enable SGMII Master */
#endif
SgmiiCfg.loopbackEn = 0x0; /* Disable SGMII loopback */
SgmiiCfg.txConfig = SGMIICFG_TX_CONFIG; /* Enable tx */
SgmiiCfg.rxConfig = SGMIICFG_RX_CONFIG; /* Enable rx */

/* Setup for 125 MHz ref clock */
SgmiiCfg.auxConfig = SGMIICFG_AUX_CONFIG; /* Enable PLL */
#ifdef C6657
SgmiiCfg.modeOfOperation = SGMII_MODE_OF_OPERATION_WITH_AN; // Auto Negotiation on
#else
SgmiiCfg.modeOfOperation = SGMII_MODE_OF_OPERATION_WITHOUT_AN; // Auto Negotiation off
#endif
i = SGMII_config(&SgmiiCfg);

if( i == 0 )
emac_debug_print(("SGMII config successful........\n"));
else
{
emac_debug_print(("SGMII config NOT successful........\n"));
return EMAC_DRV_RESULT_OPEN_PORT_ERR;
}

/* wait for the Link to Come Up */
do
{
stat = SGMII_REGS->STATUS;
emac_debug_print(("Came to do loop........\n"));
stat = stat & 0x1;
} while( stat != 0x1 );
emac_debug_print(("do loop finished........\n"));
}
#endif /* defined(C6457) || defined(C6474) || defined(C6657) */

Thanks,
Ram.

0 Jens Biltoft over 8 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram
I will ty to answer your questions

1) Yes You need to release the reset pin on the PHY - I do not know which GPIO you have connected to the PHY reset
2) Normal PHY mode is where there is no loopback - I have not tried what mode 1 and 2 does, so I cant say
3) Your code is the same as mine.

From your output it seems that your code is stuck in the loop
do
{
stat = SGMII_REGS->STATUS;
emac_debug_print(("Came to do loop........\n"));
stat = stat & 0x1;
} while( stat != 0x1 );

because the SGMII link is never up.

I was stuck at this ponit for a long time, and I am not sure excactly what was wrong, but here are some of the things you need to verify
1) You must have an Ethernet cable connected from the board to a PC or router.
2) The reset signal of the PHY must have a 5 kOhm pulldown resistor to ensure that the PHY is properly reset
3) The address of the PHY is set by a resistor on the config pins, muts match the address used in your code
4) The requirements for the routing of the SGMII signals between PHY and DSP are quit hard, and you should ensure that you follow these
5) You should ensure that the DSP gets the correct SGMI clock signal and that you configure the Serdes correctly

void configSerdes()
{
int i;
/* Unlock the chip configuration registers to allow SGMII SERDES registers to
* be written */
CSL_BootCfgUnlockKicker();

/* Configure the SERDES */
/* Multiply to be 8 with Quarter Rate in the Rx registers */
CSL_BootCfgSetSGMIIConfigPLL (0x00000051); // original 250MHz -> 1.25GHz
// CSL_BootCfgSetSGMIIConfigPLL (0x00000065); // 200MHz -> 1.25GHz

platform_delaycycles(100);

//31:25 Reserved 0000000
//23:24 LOOPBACK 00
// 22 ENOC 1
//21:18 EQ 0001
//17:15 CDR 001 -- first order threshold of 17
//14:12 LOS 000 -- tie off
//11:10 ALIGN 01 -- Comma Aligned
//09:07 TERM 100 -- tie off (100)
// 06 INVPAIR 0
//05:04 RATE 01 -- tie off (10) //00 = Full Rate, 01 = Half Rate (*0.5), 10 = Quarter Rate (*0.25)
//03:01 BUSWIDTH 000 -- tie off
// 00 ENRX 1
// 0000 0000 0100 0100 0000 0010 0001 0001 = 0x0044_0211 -- My estimated value
// 0000 0000 0100 0100 0000 0100 0001 0001 = 0x0044_0411 -- New DV value
// 0000 0000 0000 1000 0000 1000 0100 0001 = 0x0008_0841 -- Original DV value

CSL_BootCfgSetSGMIIRxConfig (0, 0x00700621);

//31:22 Reserved 0
//21:20 LOOPBACK 00
//19:18 RDTCT 00 -- tie off
// 17 ENIDL 0 -- tie off
// 16 MYSNC 1 -- tie off
//15:12 DEMPHASIS ???? - 0001 Lets give some de-emphasis
//11:08 SWING ????
// 07 CM 1 -- tie off
// 06 INVPAIR 0
//05:04 RATE 01 -- tie off
//03:01 BUSWIDTH 000 -- tie off
// 00 ENTX 1
// 0000 0000 0011 0001 ???? ???? 1001 0001 = 0x0031_1E91 -- My estimated value
// 0000 0000 0000 0001 0000 1111 0001 0001 = 0x0001_0F11 -- New DV value
// 0000 0000 0100 0000 0001 1110 0100 0001 = 0x0040_1e41 -- Original DV value
CSL_BootCfgSetSGMIITxConfig (0, 0x000108A1);

/* Poll the SGMII0 lock bit to confirm that the sgmii module has recognized
that the SERDES PLL has locked */
/*
do
{
CSL_SGMII_getStatus(0, &sgmii_status);
} while (sgmii_status.bIsLocked != 1);
*/
for(i = 0; i < 10000; i++)
{
if (SGMII_SERDES_STS & 0x01)
break;
platform_delay(1000);
}
/* All done with configuration. Return Now. */
return;
}

I hope this works for you, but if it des not I would recommend that you contact the company called Einfochips that have developed the EVM, we had a consultant from them at our site for two weeks and that really helped us alot.

Best
Jens

0 Ramana_Munich over 8 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

Thanks for the useful info. i am configuring wrong pll.
As my input clock frequency is 312.5MHz. so to get 1.25 GHz SGMII clock. i changed here like to 0x41 (not 0x21).
CSL_BootCfgSetSGMIIConfigPLL (0x00000041); //CSL_BootCfgSetSGMIIConfigPLL (0x00000021).

The output comes as shown below.i think it came some exceptions in threads i configured. it came upto the point
Registration of the EMAC Successful, waiting for link up . Please send me the final result how it looks like, i compare with mine.

//Output
void hookThreadBegin
void hookThreadInit
emac_init: core 0, port 0, total number of channels/MAC addresses: 1/1
MAC addresses configured for channel 0:
00-17-EA-F1-52-D7
SGMII reset successful........
SGMII config successful........
emac_open core 0 port 0 successfully
Registration of the EMAC Successful, waiting for link up ..
00000.000 mmBulkAlloc(): could not allocate memory.
00000.000 out of memory: handle=0xbebebebe, size=3200171710
Service Status: DHCPC : Failed : : 000
void hookStatusReport
ti.sysbios.heaps.HeapMem: line 294: out of memory: handle=0x8e1c08, size=1804
ti.sysbios.heaps.HeapMem: line 294: out of memory: handle=0x8e1c08, size=5120
xdc.runtime.Error.raise: terminating execution

Thanks,
Ram.

0 Jens Biltoft over 8 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

Congrats - it seems that you have the lower levels of your Ethernet working.
The line "Registration of the EMAC Successful, waiting for link up .. " only comes when the PHY, SGMII and EMAC layers are up and running.

I do not think I can help with the exceptions you see - are you sure it is linked to the ethernet?

I think you should create a new thread here on the forum where you ask about this exception.

The is one thing you must make sure that you only start the stack once.

In my configuratiopn I have set the flag
Global.enableCodeGeneration = true;

This makes the configuration genearte code for starting the sctak. This means that your client.c should not have code for starting the stack
/*
* Boot the system using this configuration
*
* We keep booting until the function returns 0. This allows
* us to have a "reboot" command.
*/
do
{
rc = NC_NetStart(hCfg, ti_ndk_config_Global_NetworkOpen,
ti_ndk_config_Global_NetworkClose,
ti_ndk_config_Global_NetworkIPAddr);
} while( rc > 0 );

In older versions of the helloworld and client examples this code was in the client.c file, but if you let the configuration generate the code, then you must remove the call to NC_NetStart from your code.

you can check if you call NC_NetStart twice if you find NC_NetStart in the disassembly window and set a breakpoint there.

Best
Jens

0 Ramana_Munich over 8 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

After some bug fixes i got the output like below, if possible please send me the right output what you are getting. i am trying to look what exactly this client application is doing. if it is possible please explain me.

TCP/IP Stack Example Client

6:48 ( 9%) 4:96 ( 12%) 9:128 ( 37%) 0:256
1:512 ( 16%) 0:1536 0:3072
(12288/49152 mmAlloc: 20/0/20, mmBulk: 0/0/0)

void hookThreadBegin
void hookThreadInit
emac_init: core 0, port 0, total number of channels/MAC addresses: 1/1
MAC addresses configured for channel 0:
00-17-EA-F1-52-D7
SGMII reset successful........
SGMII config successful........
emac_open core 0 port 0 successfully
Registration of the EMAC Successful, waiting for link up ..
Service Status: DHCPC : Enabled : : 000
void hookStatusReport
Service Status: HTTP : Enabled : : 000
void hookStatusReport
void hookNetworkOpen
Service Status: DHCPC : Enabled : Running : 000
void hookStatusReport
Network Added: If-1:xx.xx.xx.xx
void hookNetworkIP
Service Status: DHCPC : Enabled : Running : 017
void hookStatusReport

Thanks,

Ram.

0 Jens Biltoft over 8 years ago in reply to Ramana_Munich

Expert 1220 points

Hi Ram

why do you want my output? You have a working connection?

Anyway, I do not have the project at hand so it I cant give you my output, but I beleive that I is that same as you have.

Have you tried opening a telnet connection to your board?
You should be able to telnet to the IP adress port 23 (use Putty or TeraTerm)

There are also some windows test application you can play with under ti\ndk_2_24_00_11\packages\ti\ndk\winapps

These are alos usefull when you start developing your own application.

If you have added the webpages to your project you should also be able to open a web page from your PC if you enter the ip adress in the browser bar

Jens

0 Ramana_Munich over 8 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,

ya its fine. i hope now i have a working connection. i saw already some examples ti\ndk_2_24_00_11\packages\ti\ndk\winapps.
i test now.

Thanks,

Ram.

0 Ramana_Munich over 8 years ago in reply to Jens Biltoft

Expert 1660 points

Hi Jens,
i tested with the EVM board recv.exe(ti\ndk_2_24_00_11\packages\ti\ndk\winapps) , it works completely fine. But i am struggling to test with my custom board.
Have you tested any of the applications under "ti\ndk_2_24_00_11\packages\ti\ndk\winapps" ? or you tested any other way which worked to send packets from outside to DSP?

Thanks,
Ram.

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