Hello,
I am working on an Keystone II - 66AK2H12 on an EVMK2HX, ev.3 board and I need to analyze the accesses towards the MSMC memory sub-system.
So, my question is, how do the prefetch buffer inside XMC works? I mean:
HOW MANY data does the XMC prefetches as it receives a (L1D or L2) cache miss to an address whose corresponding MAR PFX bit is set to 1? Does it fill the full 8x128byte prefetch buffer?
I already read the section 7.5 on SPRUGW0C, and several presentations and PDF downloaded by your KB, but I found no answer
Best
Paolo Burgio