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DSP selection for LIDAR photon counter.

MARTY LAWSON
Prodigy 20 points
Other Parts Discussed in Thread: TIDA-00271

I am investigating the suitability of TI's DSP's for a time-resolved photon-counting application.  (i.e. LIDAR)

This application requires 7-8 counters that will count external pulses.  Reading the current value of those 7-8 counters at 20MHz.  Computing the difference between successive counter reads, and then adding that difference to the appropriate time/channel memory location.  

It appears that TI's 1GHz class 2-4 core DSPs have the instruction throughput to do this photon counting in one core.  One core would also be reserved for data packing, supervision, and external communication with any spare cores reserved for feature creep.  What I don't know is if the peripheral IO is fast enough to read 7-8 timer/counter values at 20MHz and still get something else done.  Can you please suggest which TI DSP would be most appropriate for this application?

  • 0
    TI__Guru* 81335 points

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

    Please refer below link which will TI offerings and online trainings on multicore DSP's.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/368521.aspx

    We are working on your post and will get back to you.

  • 0
    TI__Mastermind 20790 points

    Marty Lawson,

    For LIDAR application:

    http://www.ti.com/lit/snaa123

    http://processors.wiki.ti.com/index.php/SAT_-_ADAS_Sensor_Interconnect_Board_-_TIDA-00271

    You can get the details if you post at DLP forum: http://e2e.ti.com/support/dlp__mems_micro-electro-mechanical_systems/default.aspx

  • 0
    Prodigy 20 points

    I would like someone to actually answer my question instead of directing me to just RTFM.  My question has two parts.  How much processor overhead is required to read from the on-chip timers?  Can the general purpose timers all be clocked from independent external sources?  So while my question is simple, it requires detailed knowledge of TI's multi-core products.  knowledge that is WELL buried in a plethora of 300 page data-sheets. 

    My research so far has on the Keystone parts is that the overhead to read the timers is likely zero with the DMA engine doing all the work, but I've yet to read any exact confirmation.  It also looks like the Keystone parts only have 2 input pins that connect to the timers.  So the Keystone parts won't work due to poor IO design.  Some other TI part may work.  Even the multi-core ARMs are an option as I just need fast adds, bit-stuffing, and a wide DMA engine.

    Oh well, Analog Devices has been much more helpful.  The BlackFin BF-609 should handle this photon-counting application.  (Just have to figure out which pin does what on the BF-609 eval board...)