Hello,
I would like to use C665x uPP as transmit and receive mode.
FPGA is other side of uPP and it provides uPP clock.
I am referring Step-by-Step procedure in uPP UG(spruhg9 P2-14).
And, I have a question.
Does the FPGA must provide uPP clock to C665x before procedure Step3?
- UPP_2XTXCLK (for transmit)
- UPP_CH0,1_CLK (for receive) Both clocks are provided by FPGA.
Because, Step2 specifies that clock need to enable.
Best regards, RY
