I am using the Keystone II and am having trouble Using the IPC modules. I would like to setup MSMC ram and a single IPC managed heap so that I do not have memory contention issues between the DSP cores. I will use this heap to allocate Data memory as well as MessageQ messages to pass back and forth to the ARMs. I cannot figure out how to properly setup the .cfg or the runtime environment to make this work.
I start by trying to create a new SharedRegion and setting createHeap to 1. So that it will create the HeapMemMp buff for me.
struct SharedRegion_Entry MSMC_Entry; ret = SharedRegion_getEntry(0, &MSMC_Entry); printf("getEntry returned %d\n", ret); MSMC_Entry.base = (Ptr)0x0C000000; MSMC_Entry.len = 0x10000; MSMC_Entry.ownerProcId = 1; MSMC_Entry.isValid = 1; MSMC_Entry.cacheEnable = 0; MSMC_Entry.cacheLineSize = 0; MSMC_Entry.createHeap = 1; MSMC_Entry.name = "MSMCRAM"; ret = SharedRegion_setEntry(1, &MSMC_Entry); printf("setEntry returned %d\n", ret); ret = SharedRegion_getEntry(1, &MSMC_Entry); printf("getEntry returned %d\n", ret);
Everytime SetEntry Fails with value -1. I assume I am missing something in my .cfg or am not setting it up correctly at all.
Here is my .cfg
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion'); SharedRegion.cacheLineSize = 0; SharedRegion.numEntries = 4; SharedRegion.translate = true;
This will be a homogenous system (All DSPs will run the same image).
A couple questions to go along with this:
If I register my Heap with the MessageQ on the DSP side:
MessageQ_registerHeap( HeapBufMP_Handle_upCast(heapHandle), HEAPID);
Will the ARM use the same Heap To allocate its messages even though the Heap*MP modules are all BiosOnly?