booting Linux from SGMII0 on C6678

Hi, Jeff,

It seems that you have both ethernet ports up. Does that mean you have modified the code to supoort both ports. I am not sure if you are aware that the eth0 is connected to MAC1/sgmii_1, and eth1 is to MAC0/sgmii_0. To swap the port in the code may not be as simple as swapping the phy id in the kernel because it related to the netcp resource allocation.

When you said "boot from SGMII", do you mean get the Linux kernel through ethernet? You also mentioned that using TFTP works well. Does it run on the new board?

Rex

Rex-

> It seems that you have both ethernet ports up.

We have SGMII0 working for sure, this is what we use for TFTP boot, which works on our board, and we can see Linux attempting to boot.  SGMII1 seems to have a PHY issue, which we're trying to resolve.

>  Does that mean you have modified the code to supoort both ports. I am
>  not sure if you are aware that the eth0 is connected to MAC1/sgmii_1, and
>  eth1 is to MAC0/sgmii_0.

Are you referring to the EVM 6678?  If so yes we know the EVM has these connections.

> To swap the port in the code may not be as simple as swapping the
> phy id in the kernel because it related to the netcp resource allocation.

Please allow to me clarify... are you saying the current C66x Linux, which git://linux-c6x.org source indicates is functional for two PHYs (as noted in my original post), already has the PHY IDs swapped?  I.e. Eth0 in Linux maps to SGMII1 on the 6678?  And it sounds like you're saying to to try and change this would be difficult...

Thanks.

-Jeff

Hi, Jeff,

I just want to be sure that we are on the same page. Please refer to the C6678 TRM in http://www.advantech.com/Support/TI-EVM/6678le_sd.aspx. In Figure 1.1 of Section 1.2 and Figure 2.4 in Section 2.7, the MAC1/SGMII port 1 is connected to the PHY and to the RJ45, and this is the eth0 in linux. MAC0 (or the SGMII port 0) goes to the AMC connector. It will be the eth1 once enabled. The current (or even the latest) kernel code only support 1 ethernet connection (MAC1) and through the RJ45. The kernel code needs to be modified to enable the SGMII port 0. If you have done so, that is good. If you assume both ports are enabled in the code, then you may want to take a look at this thread, http://e2e.ti.com/support/embedded/linux/f/354/p/224140/790308.aspx#790308, to see how it can be done.

Rex

Rex-

> I just want to be sure that we are on the same page. Please refer to the C6678 TRM
> in http://www.advantech.com/Support/TI-EVM/6678le_sd.aspx. In Figure 1.1 of Section
> 1.2 and Figure 2.4 in Section 2.7, the MAC1/SGMII port 1 is connected to the PHY and
> to the RJ45, and this is the eth0 in linux. MAC0 (or the SGMII port 0) goes to the
> AMC connector. It will be the eth1 once enabled

Yes we are on same page.  This is exactly our understanding.

> The current (or even the latest) kernel code only support 1 ethernet connection (MAC1)
> and through the RJ45.

This is not correct.  As I noted, in recent TI C66x code on git://linux-c6x.org/git/linux-c6x.git, the kernel has been modified to support both SGMII ports.  Our understanding is that ETH0 still remains SGMII1, and ETH1 has been enabled as SGMII0.

Our problem is that when we try to boot Linux using ETH1 we run into problems.  It may be an issue where packets are incorrectly routed in the NETCP hardware/software and are being discarded (see source code excerpt in my original post).  It may be that ETH1 works under C66x Linux, but only after boot -- can you confirm that?

Thanks Rex.

-Jeff

Rex-

As a follow-up on this, we are now able to boot Linux on the C6678 using:

   eth0 - PHY1
   eth1 - PHY2

there was one other place inside the current linux-c6x github kernel code where SGMII-to-PHY mapping had to be changed.

-Jeff

Hi, Jeff,

Glad to hear that. Do you mind sharing what the other palce need to change? Thanks!

Rex

Hi, Jeff!

Please, can you attach diff patch with your source code changes? I have similar problem on my custom board. Thank you.

Vladimir.

Vladimir-

From another engineer, I got this summary of changes to swap ports:

1) In file ./arch/c6x/platforms/phy-c66x.c lines around 61 to 81 were modified to match the hardware File ./arch/c6x/platforms/include/mach/keystone_cpsw.h lines around 123 and 124

2) I think lines 123 and 124 should already be modified in linux-c6x git.

If this is not enough, please let me know.

-Jeff

Hi, Jeff!

Thank you for your answer! Ok.

Vladimir