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C6670 romparse *.map file format

Steve Johnson94170
Prodigy 50 points

Hi All,

I am working on creating an I2C bootloader for a C6670 and I am a little confused by the romparse utility and the associated .map file used to set the Boot Parameter Table (BPT) attached to the boot table I am creating.  There does not seem to be a 1-to1 mapping between the names of the variables in the map file and the fields of the BPT (Table 2-7 & Table 3-19 in SPRUGY5B).  For example, the .map file used in the post example is shown below (I am using McSDK 2.1.2.6)

section
{
  param_index    = 0
  boot_mode      = 40
  sw_pll_prediv     = 1
  sw_pll_mult    = 16
  sw_pll_postdiv = 2
  options        = 1

  core_freq_mhz    = 625
  i2c_clk_freq_khz = 200

  dev_addr_ext = 0x50

  multi_i2c_id = 0
  my_i2c_id    = 1
  address_delay = 0
  exe_file = "post.i2c.ccs"
}

Some specific questions are:

1) What names do I use to set BPT fields not shown in this example (e.g. Boot Dev Addr).  Is there a definition documented somewhere? I have not been able to find anything.

2) I assume the variables sw_pll_prediv, sw_pll_mult, and sw_pll_postdiv are referring to the fields in the PLL Configuration (Table 2-7 of SPRUGY5B).  How would I set the PLL Config Ctrl field?

3) Why is the dev_addr_ext (Boot Dev Addr Ext field?) used instead of the "Boot Dev Addr" field?

4) This example is for the EVM, why is the core_freq_mhz field set to 625?  I thought the EVM ran at 983.04?

Any help would be greatly appreciated,

Steve

  • 0
    TI__Guru** 114410 points

    Hi Steve,

    1. Yes, we have noticed that there are some inconsistencies in the way romparse defines its fields especially because it uses same field names but have differences in functionality. For example the romparse utility defines a the layout table and pad section to hold the information for I2C device address and I2C address (Address in the 1st block). From the value specified by dev_addr_ext(of the map file) the romparse utility populates the dev_addr (of the Boot Parameter table). Confusing right? We have reported this issue by filing a bug report. The utility at the moment lacks much documentation in MCSDK but its source code and sample examples might help you configure your boot parameter table.


    2. Yes, sw_pll_prediv, sw_pll_mult, sw_pll_postdiv are refering to the predivider , multiplier and post divider in the PLL COntroller user guide. which will be translated to the field swPllCfg_msw and swPllCfg_lsw in the boot parameter table. sw_pll_flags can be used to set the PLL config CTL fields. To initialize PLL the value after new parameter table is loaded this value should be set to 1 or 2. Please note that initial version of C6678 have a errata regarding initailizing PLL through ROM code. Check to make sure your silicon version is not impacted by it. On the EVM, PLL initialization is typically handled by seocndary boot loader.

    3. Please refer to my response to your first question.

    4. Can you point me to the map file you are referring to. The map file used with IBL build uses the following setting:

    core_freq_mhz    = 1000
    i2c_clk_freq_khz = 100

    Regards

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 50 points

    Hi Rahul,

    Thank you for the quick and insightful response. Here are some follow on questions and responses

    2) Is there a default value for the swPllCfg_lsw?  So if I do not want the ROM code to configure the PLL I should set this varable to 0?

    4) Here is the link to the example map file I was refering to, is there a better example I should be using:

    C:\ti\mcsdk_2_01_02_06\tools\post\evmc6670l\bin\post_i2crom.map.pp

    To follow on:  What does the ROM code do with the core_freq_mhz and i2c_clk_freq_khz settings?  Why is the core_freq_mhz = 1000? 

    Thanks in advance,

    Steve

  • 0 in reply to Steve Johnson94170
    TI__Guru** 114410 points

    2. Yes, put all the PLL related fields to zero if you don`t want the RBL to initialize the PLLs.

     sw_pll_prediv = 0
     sw_pll_mult = 0
     sw_pll_postdiv = 0
     sw_pll_flags = 0

    4. I am not sure if there is some peripheral in the post example has some dependency on the core clock frequency or it was set that way because post is an example only to validate some device functions but purely from a boot perspective  you should be able to set it to the value you will configure through your main.PLL. The other thing that I found out was that the core_freq in no ways is involved in setting up of the PLL. core_freq_mhz and i2c_clk_fre_khz setting is used only to compute the I2C clock divder values (CLKL and CLKH values) required to be programmed in I2C registers.

    You can take a look at the I2C_init function in the C6678 ROM source provided here to understand details of the usage:

    .http://processors.wiki.ti.com/index.php/Keystone_Device_Architecture#Keystone_ROM_Boot_Examples_and_Reference_code

    Regards,

    Rahul