Hi TI experts,
My situation: CCSV5.3, MCSDK2.01.02.06, Complierv7.4.1, SYS/BIOSv6.33.6.50
Project is built under litter endianness.
I meet a problem.
When I use memcpy to copy data from MSMCSRAM to MSMCSRAM, everything is OK.
But when I use memcpy to copy data from L2SRAM to MSMCSRAM, the data changes from little endianness to big endianness. Or I can describe as the high byte and low byte are swapped!
I also think it make no sense. But before I debug further, I just can assume like above.
Can anyone tell me whether it really can be a problem sometimes or just make no sense?
Regards,
Feng