5557.pcie_pkgv2.rarpcie mem-space access problem
Hello, everyone,
I am using a custom board with the chip TMS320C6678, this board connects to a CPU board running the vxworks OS by the pcie interface, and acts as EP.
I modified the MCSDK example which is appended.Now the RC can access the configuration space of EP, but the MEM-space can not be access.I typed the command "pciHeaderShow 8" in the console of the CPU board, the following message is shown:
-> pciHeaderShow 8
vendor ID = 0x104c
device ID = 0xb005
command register = 0x0007
status register = 0x0010
revision ID = 0x01
class code = 0x04
sub class code = 0x80
programming interface = 0x00
cache line = 0x08
latency time = 0x00
header type = 0x00
BIST = 0x00
base address 0 = 0x88100000
base address 1 = 0x88104000
base address 2 = 0x88104400
base address 3 = 0x00000000
base address 4 = 0x00000008
base address 5 = 0x00000000
cardBus CIS pointer = 0x00000000
sub system vendor ID = 0x0000
sub system ID = 0x0001
expansion ROM base address = 0x00000000
interrupt line = 0x01
interrupt pin = 0x01
min Grant = 0x00
max Latency = 0x00
Capabilities - Power Management
Capabilities - Message Signaled Interrupts: 0x50 Disabled, 64-bit, MMC: 0 MME: 0
Address: 0000000000000000 Data: 0x0000
Capabilities - PCIe: Endpoint, IRQ 0
Device: Max Payload: 256 bytes, Extended Tag: 5-bit
Acceptable Latency: L0 - <1us, L1 - <8us
Errors Enabled: Correctable Non-Fatal Fatal Unsupported RequestRelaxed Ordering No Snoop
Max Read Request 512 bytes
Link: MAX Speed - unknown, MAX Width - by 2 Port - 0 ASPM - L0s
Latency: L0s - <2us, L1 - <64us
ASPM - Disabled, RCB - 64bytes Extended Sync
Speed - unknown, Width - by 1
value = 0 = 0x0
->
I do not know why the MAX speed and speed field is unknown, I checked the register content of the EP, which shows to be fine.
Can anyone give me some suggestions? Thanks a lot for your replies!
Sincerely
Eric
