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Location of the bootloader C6672

Other Parts Discussed in Thread: TMS320C6678

Hello everbody!

I was wondering where the DSP's bootloader is located. Does Code Composer Studio send it with the application, is it built in, or something different? 
I am using the TMS320C6678 evaluation kit.

Thanks in advance,
Lars Jansen
The Netherlands

  • I am not sure what you really ask

    The boot ROM is in address 0x20b0 0000  description of what the boot code is doing you can find in the boot loader UG:   http://www.ti.com/lit/ug/sprugy5c/sprugy5c.pdf

    If you want to know how to prepare code and move from out file into boot-able code, the attached Lab instruction describe how to go from out file into SPI boot.  If you have different boot, you have to modify some of teh steps, but it will give you an idea

    Ran

    6281.LabKeystone_I_boot.docx

  • Thanks for the fast reply. 

    What I'm trying to ask is, in which memory is the bootloader located. Is it MSMC, L2SRAM, or is it something completely different?

    Lars

  • Again, are you talking about the ROM boot?

    If this is so, it is located in a special memory.

    Look at the the device data sheet - http://www.ti.com/lit/ds/symlink/tms320c6678.pdf   section 2.3 at logical address

    0x20B0 0000

    Now, if you ask where does the program that you want to boot reside,  this depends what type of boot you do.  Read the user guide and if you boot from any type of flash memory, read the features of the flash

    Ran

  • Aaaah, so there's the bootloader. Well okay, and is it sent along with the application in Code Composer or is it already flashed at 0x20B00000?

    Lars

  • Indeed,  Already there

    You cannot change it  (Real ROM)

    Ran

  • Thanks Ran, that's clear now.

    But one question remains, if I want to connect other DDR3 memory to the C667x, I need to change the SDTIM and SDCFG (etc). registers in emif4.c, right?

    So how do I flash that? Is that file being flashed along with my application?

    Lars

  • Hi Lars,

    Please refer to the DSP bootloader user guide for DDR3 configuration on C667x. The ROM essentially has a region defined in the DSP RAM space that is defined for the DDR3 configuration table.The DDR configuration table is a structure that contains fields from which you can provide the SD config and timing values. When you populate that region during boot Boot ROM checks the region and will use the values you have placed in that region to configure the DDR. 

    I have an example for this on a similar device C665x that you can use as reference for your development:

    4300.SPIboot_ddr.zip


    Note: the DDR configuration table and its location is different on each device please refer to the tiboot_c66x.h in the mcsdk to look for its location for your device.

    Regards,

    Rahul