The program run is complete, after DSP is connected with the emulator, data in the address keeps changing

Hi,

When data is written correctly on Chip 2, the data viewed through Chip 1 is also correct; if data written to Chip 2 is wrong, data stored in the address viewed through chip 1 keeps changing.

Is that data was written some time correct and wrong ?
Else intentionally you are doing ?
What example code are you using ?

Have you tried to run the program completly through CCS and emulator ?

Hi Titus,

1. Is that data was written some time correct and wrong ?
-> Yes, data was written sometimes correct, sometimes wrong.

2. Else intentionally you are doing ? And What example code are you using ?
-> In fact, I'm using the DSP 1 to realize its multicore boot (spi mode) with my own client codes, but it doesn't always boot successfully, sometimes good, sometimes bad. So I tried to add sending data steps to locate the error in my codes, but every time when the data was written wrong, the data at the address 0x833FFF00 keeps changing. So it made me confused.

3. Have you tried to run the program completly through CCS and emulator ?
-> Yes, I have tried to run the program completely through CCS and emulator and there was no error and everything was fine.

Hope for your response, thanks!!

Hi,

Which interface you using for transfer data to two DSPs?

Have you using the same test code for both DSPs? Your test application code or data section use the DDR memory.

Thanks,

Hi Ganapathi,

1. Which interface you using for transfer data to two DSPs?
-> I'm using SRIO for transfer data of two DSPs.

2. Have you using the same test code for both DSPs?
-> No, the test code for DSP 1 is a multicore boot code that is programmed into FLASH. The test code for DSP 2 is only to set up the SRIO connection with DSP 1 and receive the data from DSP 1.

For your information,
thanks

Hi Ganapathi,

1. Which interface you using for transfer data to two DSPs?
-> I'm using SRIO for transfer data of two DSPs.

2. Have you using the same test code for both DSPs?
-> No, the test code for DSP 1 is a multicore boot code that is programmed into FLASH. The test code for DSP 2 is only to set up the SRIO connection with DSP 1 and receive the data from DSP 1.

For your information,
thanks

Hi,

Thanks for your information. Which type of SRIO transfer using, please provide more information on your SRIO configuration setup.

Have you try to transfer the data on other memory regions(MSMC and L2 memory)?

In Your test application code section and data section are use the DDR memory region?

Thanks,

Hi Ganapathi,

1. Which type of SRIO transfer using, please provide more information on your SRIO configuration setup.
-> DirectIO, swrite

2. Have you try to transfer the data on other memory regions(MSMC and L2 memory)?
-> No, only on DDR3.

3. In Your test application code section and data section are use the DDR memory region?
-> No, only use MSMC.

For your information,
thanks

Hi,

I think it is not a SRIO transfer issue, the DDR3 memory region is not protected for specific core. Some other corepacs are accessing DDR3 memory on your code, that only the DDR3 value is changing. Better to command other functions(except SRIO and DDR initialization code) on your test code and then validate the SRIO transfer to DDR memory.

Have you validated the DDR3 memory properly initialized on both DSPs?

Thanks,

Hi Ganapathi,

I have simplified my test code that only uses the Core0 to write data into DDR3 memory and the others do nothing. My code is as below:

uint32_t coreId = CSL_chipReadReg(CSL_CHIP_DNUM);

if (coreId == 0)
{
first_init();
MulticoreBoot();
unsigned char* unusedL2 = (unsigned char*)0x83000000;
for(i=0;i<100;i++)
{
*(unusedL2+i) = i;
}
return 0;
}
else
{
return 0;
}

All the 8 cores have correctly launched but the data which is written into DDR3 is wrong and keeps changing...

Could you tell me how to solve this problem? Thanks a lot!

Hi,

I think problem on your test application DDR3 configuration. Please share your project, i will try to resolve your issue.

Have you do DDR3 initialization on test code or using .gel file for initialize the DDR3?

Thanks,

Hi Ganapathi,

Please find attached our project. Thanks!

There's a ""first init()" function to do the initialization. 

Please analyze our test code and share with us your feedback. Thanks!Test_dempo.zip

Hi,

Thanks for your update. I will try to test your project and give my feedback.

Hi Ganapathi,

Thanks a lot for your help!!

Best regards

Hi Ganapathi,

I have also tested by connecting the DSP with the emulator and load the program to run. There wasn't any changing of the DDR3 data in that case. But if I program the code into FLASH and set the boot mode as SPI-NOR Flash to boot the 8 cores, the data in DDR3 kept changing and the data was wrong observed by being connected with emulator.
I don't know whether I have made my issue clear. Thanks!

Fan Li