Dear All:
We designed a board which connect 6678 with fpga v6 by SRIO in 4X mode.
When the system finishes booting, sometimes the SRIO is inited to 1X mode
(about 50%). The register about SRIO is set like this:
KEYSTONE_RIO_PER_SET_CNTL(0x02900014) = 0x0c053860
KEYSTONE_RIO_SERDES_CFG_PLL_REG(0x02620360)=0x0229
KEYSTONE_RIO_PRESCALAR_SRV_CLK(0x0291bd30)=0x1e
KEYSTONE_RIO_SERDES_CFG_RX_REG(0x0290364 ... ) = 0x00440495 ...
KEYSTONE_RIO_SERDES_CFG_TX_REG(0x0290368 ... ) = 0x00180795 0x00080795 ...
KEYSTONE_RIO_SP_PATH_CTL(0x0291b0b0 ... )=0x04
We have pay attention to board layout and take meatures to make
the line fine as much as possible.
I read a lot in this forum and got a lot from here, but still can't resolve this bug.
Can anyone give advice?
I notice someone has mentioned, when the software detect 1X, it can reinit the
SRIO subsystem and wait to see if it can be inited to 4X: if yes, proceed; if no,
restart. Could anyone give me the detailed steps?
Thanks!
KEYSTONE_RIO_SERDES_CFG_PLL_REG